Datasheet

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LP3856-ADJ

OUT

ADJ

GND

OUT

INPUT

OUTPUT

R1**

R2**

OUT

= 1.216 x (1+

)

SDSD

10 PF

* TANTALUM OR

CERAMIC

LP3856-ADJ

www.ti.com

SNVS243E –SEPTEMBER 2003–REVISED APRIL 2013

LP3856-ADJ 3A Fast Response Ultra Low Dropout Linear Regulators

Check for Samples: LP3856-ADJ

FEATURES

DESCRIPTION

The LP3856-ADJ fast ultra low-dropout linear

• Ultra Low Dropout Voltage

regulators operate from a +2.5V to +7.0V input

• Stable with Selected Ceramic Capacitors

supply. These ultra low dropout linear regulators

• Low Ground Pin Current

respond very quickly to step changes in load, which

makes them suitable for low voltage microprocessor

• Load Regulation of 0.08%

applications. The LP3856-ADJ is developed on a

• 10nA Quiescent Current in Shutdown Mode

CMOS process which allows low quiescent current

• Specified Output Current of 3A DC

operation independent of output load current. This

CMOS process also allows the LP3856-ADJ to

• Available in DDPAK/TO-263 and TO-220

operate under extremely low dropout conditions.

Packages

• Overtemperature/Overcurrent Protection

Dropout Voltage: Ultra low dropout voltage; typically

39mV at 300mA load current and 390mV at 3A load

• −40°C to +125°C Junction Temperature Range

current.

APPLICATIONS

Ground Pin Current: Typically 4mA at 3A load

current.

• Microprocessor Power Supplies

Shutdown Mode: Typically 10nA quiescent current

• GTL, GTL+, BTL, and SSTL Bus Terminators

when the shutdown pin is pulled low.

• Power Supplies for DSPs

Adjustable Output Voltage: The output voltage may

• SCSI Terminator

be programmed via two external resistors.

• Post Regulators

• High Efficiency Linear Regulators

• Battery Chargers

• Other Battery Powered Applications

TYPICAL APPLICATION CIRCUIT

**See Application Hints

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 LP3856-ADJ 3A Fast Response Ultra Low Dropout Linear Regulators Check for Samples: LP3856-ADJ FEATURES DESCRIPTION • • • • • • • The LP3856-ADJ fast ultra low-dropout linear regulators operate from a +2.5V to +7.0V input supply. These ultra low dropout linear regulators respond very quickly to step changes in load, which makes them suitable for low voltage microprocessor applications.
PAGE 2
LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. CONNECTION DIAGRAM Figure 1. TO-220-5 Package (Top View) Bent, Staggered Leads Figure 2.
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LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 ABSOLUTE MAXIMUM RATINGS (1) VALUE / UNITS −65°C to +150°C Storage Temperature Range Lead Temperature (Soldering, 5 sec.) ESD Rating 260°C (2) Power Dissipation 2 kV (3) Internally Limited −0.3V to +7.5V Input Supply Voltage (Survival) −0.3V to 7.5V Shutdown Input Voltage (Survival) Output Voltage (Survival), (4) (5) −0.3V to +6.
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LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS — LP3856-ADJ Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 10µF, VSD = 2V.
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LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. Ground Current vs Output Load Current VOUT = 5V Dropout Voltage vs Output Load Current 4.9 DROPOUT VOLTAGE (mV) 500 o 12 5 GROUND PIN CURRENT (mA) 600 C 400 C 25 300 o o -40 C 200 100 4.85 4.8 4.75 4.7 125oC 4.65 25oC 4.6 4.55 -40oC 4.5 4.
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LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. VIN vs VOUT Over Temperature 3.000 2.5 2.500 -40oC 0.5 2.000 NOISE (PV/ Hz 1.5 1.0 IL = 100mA CIN = COUT = 10PF ( 2.0 VOUT (V) Noise vs Frequency 3.0 25oC 1.500 1.000 0.500 125oC 0.0 0.000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.
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LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. Load Transient Response CIN = COUT = 100µF, TANTALUM Load Transient Response CIN = COUT = 10µF, OSCON VOUT 100mV/DIV MAGNITUDE MAGNITUDE VOUT 100mV/DIV ILOAD 3A/DIV ILOAD 1A/DIV TIME (50Ps/DIV) TIME (50Ps/DIV) Figure 15. Figure 16.
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LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. Load Transient Response CIN = 4 x 10µF CERAMIC COUT = 3 x 10µF CERAMIC VOUT 100 mV/DIV Load Transient Response CIN = 4 x 10µF CERAMIC COUT = 3 x 10µF CERAMIC VOUT 100 mV/DIV VOUT = 2.
PAGE 9
LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 Application Hints SETTING THE OUTPUT VOLTAGE The output voltage is set using the resistors R1 and R2 (see Typical Application Circuit). The output is also dependent on the reference voltage (typically 1.216V) which is measured at the ADJ pin. The output voltage is given by the equation: VOUT = VADJ x ( 1 + R1 / R2) (1) This equation does not include errors due to the bias current flowing in the ADJ pin which is typically about 10 nA.
PAGE 10
LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com OPERATION WITH CERAMIC OUTPUT CAPACITORS LP385X voltage regulators can operate with ceramic output capacitors if the values of input and output capacitors are selected appropriately. The total ceramic output capacitance must be equal to or less than a specified maximum value in order for the regulator to remain stable over all operating conditions.
PAGE 11
LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of the temperature range.
PAGE 12
LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com If a load is connected to the IC output which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the IC output. Since the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency.
PAGE 13
LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 DROPOUT VOLTAGE The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the nominal output voltage. For CMOS LDOs, the dropout voltage is the product of the load current and the Rds(on) of the internal MOSFET. REVERSE CURRENT PATH The internal MOSFET in LP3856-ADJ has an inherent parasitic diode.
PAGE 14
LP3856-ADJ SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com Figure 27. θJA vs Copper (1 Ounce) Area for DDPAK/TO-263 Package As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. The minimum value for θJA for the DDPAK/TO-263 package mounted to a PCB is 32°C/W. Figure 28 shows the maximum allowable power dissipation for DDPAK/TO-263 packages for different ambient temperatures, assuming θJA is 35°C/W and the maximum junction temperature is 125°C.
PAGE 15
LP3856-ADJ www.ti.com SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision D (April 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 7-Oct-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LP3856ESX-ADJ/NOPB Package Package Pins Type Drawing SPQ DDPAK/ TO-263 500 KTT 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 14.85 5.0 16.0 24.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3856ESX-ADJ/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.
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MECHANICAL DATA NDH0005D www.ti.
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MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.
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