Datasheet

LP3853, LP3856
www.ti.com SNVS173G –FEBRUARY 2003–REVISED APRIL 2013
SHUTDOWN OPERATION
A CMOS Logic low level signal at the Shutdown (SD) pin will turn-off the regulator. Pin SD must be actively
terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively
pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be
tied to Vin if not used.
The Shutdown (SD) pin threshold has no voltage hysteresis. If the Shutdown pin is actively driven, the voltage
transition must rise and fall cleanly and promptly.
DROPOUT VOLTAGE
The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within
2% of the nominal output voltage. For CMOS LDOs, the dropout voltage is the product of the load current and
the Rds(on) of the internal MOSFET.
REVERSE CURRENT PATH
The internal MOSFET in LP3853 and LP3856 has an inherent parasitic diode. During normal operation, the input
voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is
pulled above the input in an application, then current flows from the output to the input as the parasitic diode gets
forward biased. The output can be pulled above the input as long as the current in the parasitic diode is limited to
200mA continuous and 1A peak.
POWER DISSIPATION/HEATSINKING
LP3853 and LP3856 can deliver a continuous current of 3A over the full operating temperature range. A heatsink
may be required depending on the maximum power dissipation and maximum ambient temperature of the
application. Under all possible conditions, the junction temperature must be within the range specified under
operating conditions. The total power dissipation of the device is given by:
P
D
= (V
IN
−V
OUT
)I
OUT
+ (V
IN
)I
GND
where I
GND
is the operating ground current of the device (specified under Electrical Characteristics).
The maximum allowable temperature rise (T
Rmax
) depends on the maximum ambient temperature (T
Amax
) of the
application, and the maximum allowable junction temperature (T
Jmax
):
T
Rmax
= T
Jmax
− T
Amax
The maximum allowable value for junction to ambient Thermal Resistance, θ
JA
, can be calculated using the
formula:
θ
JA
= T
Rmax
/ P
D
LP3853 and LP3856 are available in TO-220 and TO-263 packages. The thermal resistance depends on amount
of copper area or heat sink, and on air flow. If the maximum allowable value of θ
JA
calculated above is ≥ 60 °C/W
for TO-220 package and ≥ 60 °C/W for TO-263 package no heatsink is needed since the package can dissipate
enough heat to satisfy these requirements. If the value for allowable θ
JA
falls below these limits, a heat sink is
required.
HEATSINKING TO-220 PACKAGE
The thermal resistance of a TO220 package can be reduced by attaching it to a heat sink or a copper plane on a
PC board. If a copper plane is to be used, the values of θ
JA
will be same as shown in next section for TO263
package.
The heatsink to be used in the application should have a heatsink to ambient thermal resistance,
θ
HA
≤ θ
JA
− θ
CH
− θ
JC
.
In this equation, θ
CH
is the thermal resistance from the case to the surface of the heat sink and θ
JC
is the thermal
resistance from the junction to the surface of the case. θ
JC
is about 3°C/W for a TO220 package. The value for
θ
CH
depends on method of attachment, insulator, etc. θ
CH
varies between 1.5°C/W to 2.5°C/W. If the exact value
is unknown, 2°C/W can be assumed.
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