Datasheet

2
1
I
OUT
@ 1A
V
OUT
@ 2.5V
T
T
TIME (1 Ps/DIV)
V
OUT
100mV/DIV
I
LOAD
1A/DIV
TIME (50Ps/DIV)
MAGNITUDE
2
1
I
OUT
@ 1A
T
T
I
OUT
1A/DIV
V
OUT
100 mV/DIV
V
OUT
= 2.5V
TIME (2 Ps/DIV)
LP3852, LP3855
www.ti.com SNVS174G –FEBRUARY 2003–REVISED APRIL 2013
Typical Performance Characteristics (continued)
Unless otherwise specified: T
J
= 25°C, C
OUT
= 10µF, C
IN
= 10µF, S/D pin is tied to V
IN
, V
OUT
= 2.5V, V
IN
= V
O(NOM)
+ 1V, I
L
=
10 mA.
Load Transient Response
Load Transient Response C
IN
= 2 x 10µF CERAMIC
C
IN
= C
OUT
= 100µF, TANTALUM C
OUT
= 2 x 10µF CERAMIC
Figure 18. Figure 19.
Load Transient Response
C
IN
= 2 x 10µF CERAMIC
C
OUT
= 2 x 10µF CERAMIC
Figure 20.
Application Hints
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be
correctly selected for proper performance.
INPUT CAPACITOR: An input capacitor of at least 10µF is required. Ceramic or Tantalum may be used, and
capacitance may be increased without limit
OUTPUT CAPACITOR: An output capacitor is required for loop stability. It must be located less than 1 cm from
the device and connected directly to the output and ground pins using traces which have no other currents
flowing through them (see PCB Layout section).
The minimum amount of output capacitance that can be used for stable operation is 10µF. For general usage
across all load currents and operating conditions, the part was characterized using a 10µF Tantalum input
capacitor. The minimum and maximum stable ESR range for the output capacitor was then measured which kept
the device stable, assuming any output capacitor whose value is greater than 10µF (see Figure 21 below).
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