Datasheet

R3
10 k:
C
IN
(C1)
10 PF
C
OUT
(C2)
10 PF
R2
1.00 k:
R1
1.40 k:
J1
J2
J4
J3
V
OUT
GND
V
IN
V
EN
C
FF
(C3)
3300 pF
VOUT
GND
VIN
ENABLE
C1
C2
U1
TP1
TP2
TP3
TP4
R3
R2
R1
C3
PCB Layout www.ti.com
8 PCB Layout
Figure 8. Evaluation Board Component and Pin Layout
Figure 9. Top Side Copper Area
6
AN-1770 LP38511MR-ADJ Evaluation Board SNVA311B–March 2009–Revised April 2013
Submit Documentation Feedback
Copyright © 2009–2013, Texas Instruments Incorporated