Datasheet

LP38511-ADJ
www.ti.com
SNVS545D JANUARY 2009REVISED APRIL 2013
Figure 23. θ
JA
vs Thermal Via Count for the SO PowerPad Package on 4–Layer PCB
Figure 24 shows thermal performance for a two layer board using thermal vias to a copper area on the bottom of
the PCB. The copper area on the top of the PCB, which is soldered to the exposed DAP, is 0.10in x 0.20in,
which is approximately the same dimensions as the body of the SO PowerPad package. The copper area on the
bottom of the PCB is a square area and is centered directly under the SO PowerPad package.
Figure 24. θ
JA
vs Thermal Via Count for the SO PowerPad Package on 2–Layer PCB with Copper Area on
Bottom-Side
Figure 25 shows thermal performance for a two layer board with the DAP soldered to copper area on the of the
PCB only. Increasing the copper area soldered to the DAP to 1 square inch of 1 ounce copper, using a dog-bone
type layout, will produce a typical θ
JA
rating of 98°C/W.
Figure 25. θ
JA
vs Copper Area for the SO PowerPad Package on 2–Layer PCB with Copper Area on Top-
Side
Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LP38511-ADJ