Datasheet

LP38501-ADJ, LP38503-ADJ
SNVS522H –AUGUST 2007–REVISED APRIL 2013 www.ti.com
Typical Application Circuit
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Connection Diagram
Top View (LP38501TS-ADJ) Top View (LP38503TS-ADJ)
See Package Number KTT0005B (TO-263) See Package Number KTT0005B (TO-263)
Connection Diagram
Top View (LP38501TJ-ADJ, LP38501ATJ-ADJ) Top View (LP38503TJ-ADJ, LP38503ATJ-ADJ)
See Package Number NDQ0005A (PFM THIN) See Package Number NDQ0005A (PFM THIN)
Pin Descriptions for TO-263 (TS) and TO-263 THIN (TJ)
Pin # Designation Function
Enable (LP38501 only). Pull high to enable the output, low to disable the output. This pin has
EN
no internal bias and must be either tied to the input voltage, or actively driven.
1
In the LP38503, this pin has no internal connections. It can be left floating or used for trace
N/C
routing.
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Product Folder Links: LP38501-ADJ LP38503-ADJ