Datasheet

VDDQ
PVIN
AVIN
1
2
3
4
8
7
6
5
VSENSE
VREF
SD
GND
VTT
VDDQ
PVIN
AVIN
1
2
3
4
8
7
6
5
VSENSE
VREF
SD
GND
VTT
GND
LP2998/LP2998-Q1
SNVS521J –DECEMBER 2007–REVISED DECEMBER 2013 www.ti.com
Connection Diagrams
Top View
Figure 1. SO PowerPAD-8 Package
See Package Number DDA0008A
Top View
Figure 2.
SOIC-8 Package
See Package Number D0008A
Pin Descriptions
SOIC-8 Pin or SO PowerPAD-8 Pin Name Function
1 GND Ground.
2 SD Shutdown.
3 VSENSE Feedback pin for regulating V
TT
.
4 VREF Buffered internal reference voltage of V
DDQ
/2.
5 VDDQ Input for internal reference equal to V
DDQ
/2.
6 AVIN Analog input pin.
7 PVIN Power input pin.
8 VTT Output voltage for connection to termination resistors.
EP Exposed pad thermal connection. Connect to Ground (SO PowerPAD-8 only).
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Product Folder Links: LP2998/LP2998-Q1