Datasheet
VDDQ
PVIN
AVIN
1
2
3
4
8
7
6
5
VSENSE
VREF
SD
GND
VTT
GND
VDDQ
VREF
VSENSE
AVIN
10 11
GND
N/C
N/C
PVIN
PVIN
12
9
8
7
6
5
4 3
2
1
13
14
15
16
VTT
N/C
VTT
N/C
GND
N/C
N/C
SD
VDDQ
PVIN
AVIN
1
2
3
4
8
7
6
5
VSENSE
VREF
SD
GND
VTT
LP2996-N
SNOSA40J –NOVEMBER 2002–REVISED MARCH 2013
www.ti.com
Connection Diagram
Figure 2. SOIC-8 Layout
Figure 1. WQFN-16 Layout (Top View)
Figure 3. SO PowerPAD-8 Layout
PIN DESCRIPTIONS
SOIC-8 Pin
or SO
WQFN Pin Name Function
PowerPAD-8
Pin
1 2 GND Ground
2 4 SD Shutdown
3 5 VSENSE Feedback pin for regulating V
TT
.
4 7 VREF Buffered internal reference voltage of V
DDQ
/2
5 8 VDDQ Input for internal reference equal to V
DDQ
/2
6 10 AVIN Analog input pin
7 11, 12 PVIN Power input pin
8 14, 15 VTT Output voltage for connection to termination resistors
- 1, 3, 6, 9, 13, 16 NC No internal connection
EP EP Exposed pad thermal connection. Connect to Ground.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
AVIN to GND −0.3V to +6V
PVIN to GND -0.3V to AVIN
VDDQ
(3)
−0.3V to +6V
Storage Temp. Range −65°C to +150°C
Junction Temperature 150°C
SOIC-8 Thermal Resistance (θ
JA
) 151°C/W
SO PowerPAD-8 Thermal Resistance (θ
JA
) 43°C/W
WQFN-16 Thermal Resistance (θ
JA
) 51°C/W
Lead Temperature (Soldering, 10 sec) 260°C
ESD Rating
(4)
1kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which
the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and test conditions
see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) VDDQ voltage must be less than 2 x (AVIN - 1) or 6V, whichever is smaller.
(4) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
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