Datasheet

LP2995
www.ti.com SNVS190M –FEBRUARY 2002–REVISED MARCH 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
AVIN to GND −0.3V to +6V
PVIN to GND -0.3V to AVIN
VDDQ
(3)
−0.3V to +6V
Storage Temp. Range −65°C to +150°C
Junction Temperature 150°C
SO PowerPAD-8 Thermal Resistance (θ
JA
) 43°C/W
SOIC-8 Thermal Resistance (θ
JA
) 151°C/W
WQFN-16 Thermal Resistance (θ
JA
) 51°C/W
Lead Temperature (Soldering, 10 sec) 260°C
ESD Rating
(4)
1kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which
the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and test conditions
see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) VDDQ voltage must be less than 2 x (AVIN - 1) or 6V, whichever is smaller.
(4) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Operating Range
Junction Temp. Range
(1)
0°C to +125°C
AVIN to GND 2.2V to 5.5V
PVIN to GND 2.2V to AVIN
(1) At elevated temperatures, devices must be derated based on thermal resistance. The device in the SOIC-8 package must be derated at
θ
JA
= 151° C/W junction to ambient with no heat sink. The device in the WQFN-16 must be derated at θ
JA
= 51° C/W junction to
ambient.
Electrical Characteristics
Specifications with standard typeface are for T
J
= 25°C and limits in boldface type apply over the full Operating
Temperature Range (T
J
= 0°C to +125°C). Unless otherwise specified, AVIN = PVIN = 2.5V, VDDQ = 2.5V
(1)
.
Symbol Parameter Conditions Min Typ Max Units
V
REF
V
REF
Voltage I
REF_OUT
= 0mA 1.21 1.235 1.26 V
VOS
VTT
V
TT
Output Voltage Offset I
OUT
= 0A −15 0 15 mV
(2)
−20 20
ΔV
TT
/V
TT
Load Regulation I
OUT
= 0 to 1.5A 0.5 %
(3)
I
OUT
= 0 to −1.5A −0.5
Z
VREF
V
REF
Output Impedance I
REF
= −5µA to +5µA 5 kΩ
Z
VDDQ
VDDQ Input Impedance 100 kΩ
I
q
Quiescent Current I
OUT
= 0A 250 400 µA
(4)
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using
Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL).
(2) V
TT
offset is the voltage measurement defined as V
TT
subtracted from V
REF
.
(3) Load regulation is tested by using a 10ms current pulse and measuring V
TT
.
(4) Quiescent current defined as the current flow into AVIN.
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