Datasheet

LP2985LV-N
SNOS510P –NOVEMBER 1999–REVISED APRIL 2013 www.ti.com
Basic Application Circuit
*ON/OFF input must be actively terminated. Tie to V
IN
if this function is not to be used.
**Minimum capacitance is shown to ensure stability (may be increased without limit). Ceramic capacitor required for
output (see APPLICATION HINTS).
***Reduces output noise (may be omitted if application is not noise critical). Use ceramic or film type with very low
leakage current (see APPLICATION HINTS).
Figure 2.
Connection Diagram
Note: The actual physical placement of the package marking will vary from part to part. Package marking contains
date code and lot traceability information, and will vary considerably. Package marking does not correlate to device
type.
Top View Top View
Figure 3. 5-Lead SOT-23 Package Figure 4. 5 Bump DSBGA Package
See Package Number DBV0005A See Package Number YPB0005
PIN DESCRIPTIONS
Pin Number
Name Function
SOT-23 DSBGA
V
IN
1 C3 Input Voltage
GND 2 A1 Common Ground (device substrate)
ON/OFF 3 A3 Logic high enable input
BYPASS 4 B2 Bypass capacitor for low noise operation
V
OUT
5 C1 Regulated output voltage
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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