Datasheet

LP2966
SNVS028E –APRIL 2000–REVISED APRIL 2013 www.ti.com
TYPICAL APPLICATION CIRCUIT
*SD1 and SD2 must be actively terminated through a pull up resistor. Tie to V
IN
if not used.
**ERROR1 and ERROR2 are open drain outputs. These pins must be connected to ground if not used.
# Minimum output capacitance is 1µF to insure stability over full load current range. More capacitance improves
superior dynamic performance and provides additional stability margin.
BLOCK DIAGRAM
CONNECTION DIAGRAM
Top View
Figure 1. VSSOP-8 Package
8-Lead Small Outline Integrated Circuit
See Package Number DGK0008A
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