Datasheet

CONT

DIS

TLC555

OUT

RST

GND

THRS

TRIG

VDD

1 F

47.5kΩ

100kΩ

475kΩ

3.3V/5V

To INH/UVLO

Pin 27

From PWRGD

Pin 35

BSS138

LMZ35003

SNVS988 –JULY 2013

www.ti.com

Overcurrent Protection

For protection against load faults, the LMZ35003 incorporates cycle-by-cycle current limiting. During an

overcurrent condition the output current is limited and the output voltage is reduced, as shown in Figure 36 . As

the output voltage drops more than 8% below the set point, the PWRGD signal is pulled low. If the output voltage

drops more than 25%, the switching frequency is reduced to reduce power dissipation within the device. When

the overcurrent condition is removed, the output voltage returns to the established voltage.

The LMZ35003 is not designed to endure a sustained short circuit condition. The use of an output fuse, voltage

supervisor circuit, or other overcurrent protection circuit is recommended. A recommended overcurrent protection

circuit is shown in Figure 37. This circuit uses the PWRGD signal as an indication of an overcurrent condition. As

PWRGD remains low, the 555 timer operates as a low frequency oscillator, driving the INH/UVLO pin low for

approximately 400ms, halting the power conversion of the device. After the inhibit interval, the INH/UVLO pin is

released and the LMZ35003 restarts. If the overcurrent condition is removed, the PWRGD signal goes high,

resetting the oscillator and power conversion resumes, otherwise the inhibit cycle repeats.

Figure 36. Overcurrent Limiting Figure 37. Over-Current Protection Circuit

Product Folder Links: LMZ35003