Datasheet

LMZ34002
www.ti.com SNVS989A –JULY 2013–REVISED SEPT 2013
PIN DESCRIPTIONS
TERMINAL
DESCRIPTION
NAME NO.
26 Input voltage. This pin supplies all power to the converter. Connect this pin to the input supply and connect
VIN
bypass capacitors between this pin and GND.
16
17
Negative output voltage with respect to GND. Connect these pins to the output load and connect external
18
VOUT bypass capacitors between these pins and GND. Pad 40 should be connected to PCB VOUT planes using
19
multiple vias for good thermal performance.
20
40
10
11
12
This is the return current path for the power stage of the device. These pins are connected to the internal
GND 13 output inductor. Connect these pins to the load and to the bypass capacitors associated with VIN and
VOUT.
14
15
39
6
7
21
22
Phase switch node. Do not place any external component on these pins or tie them to a pin of another
PH
function.
23
24
38
41
8 VOUT and A_VOUT Connection Point. Connect VOUT to A_VOUT at these pins as shown in the Layout
VOUT_PT Considerations section. These pins are not connected to internal circuitry, and are not connected to one
9
other.
2
3
Do Not Connect. Do not connect these pins to GND, to another DNC pin, or to any other voltage. These pins
DNC
are connected to internal circuitry. Each pin must be soldered to an isolated pad.
25
35
1
4
These pins are connected to the internal analog reference (A_VOUT) of the device. This node should be
treated as the negative voltage reference for the analog control circuitry. Pad 37 should be connected to the
5
PCB A_VOUT plane using multiple vias for good thermal performance. Not all pins are connected together
A_VOUT 32
internally. All pins must be connected together externally with a copper plane or pour directly under the
33
module. Connect A_VOUT to VOUT at a single point (VOUT_PT; pins 8 & 9). See Layout
Recommendations.
34
37
Switching frequency adjust pin. To operate at the recommended free-running frequency, connect this pin to
RT 30 A_VOUT. Connecting a resistor between this pin and A_VOUT will reduce the switching frequency. See
Switching Frequency section.
CLK 31 Use this pin to synchronize to an external clock. If unused, isolate this pin from any other signal.
Inhibit and UVLO adjust pin. Use an external level-shifter device to ground this pin to control the INH
INH/UVLO 27
function. A resistor divider between this pin, A_VOUT, and VIN sets the UVLO voltage.
Slow-start pin. Connecting an external capacitor between this pin and A_VOUT adjusts the output voltage
SS 28
rise time.
STSEL 29 Slow-start select. Connect this pin to A_VOUT to enable the internal SS capacitor.
Connecting a resistor between this pin and GND sets the output voltage. A dedicated GND sense line
VADJ 36 connected at the load will improve regulation at the load. See Figure 48 in the Layout Considerations
section.
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