Datasheet

LMZ34002
SNVS989A –JULY 2013–REVISED SEPT 2013 www.ti.com
Layout Considerations
To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 47 through
Figure 50 show four layers of a typical PCB layout. Some considerations for an optimized layout are:
• Use large copper areas for power planes (VIN, VOUT, and GND) to minimize conduction loss and thermal
stress.
• Place ceramic input and output capacitors close to the module pins to minimize high frequency noise.
• Locate additional output capacitors between the ceramic capacitor and the load.
• Place a dedicated A_VOUT copper area beneath the LMZ34002.
• Isolate the PH copper area from the GND copper area using the VOUT copper area.
• Connect the VOUT and A_VOUT copper areas at one point; at pins 8 & 9.
• Place R
SET
, R
RT
, and C
SS
as close as possible to their respective pins.
• Use multiple vias to connect the power planes to internal layers.
• Use a dedicated sense line to connect R
SET
to GND near the load for best regulation.
Figure 47. Typical Top-Layer Recommended Figure 48. Typical GND-Layer Recommended
Layout Layout
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