Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsLMZ34002RKGT

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

5 10 15 20 25 30 35 40

Input Voltage (V)

Output Current (A)

= –3.3 V

= –5 V

= –12 V

= –15 V

G000

INH/UVLO

VOUTVIN

LMZ34002

VADJ

A_VOUT

GND

-V

OUT

STSEL

SET

OUT

VOUT_PT

CLK

LMZ34002

www.ti.com

SNVS989A –JULY 2013–REVISED SEPT 2013

2A, Negative Output, SIMPLE SWITCHER® Power Module with 4.5V-40V Input

in QFN Package

Check for Samples: LMZ34002

FEATURES

DESCRIPTION

• Complete Integrated Power Solution Allows

The LMZ34002 SIMPLE SWITCHER® power module

Small Footprint, Low-Profile Design

is an easy-to-use, negative output voltage power

• Wide Input Voltage Range from 4.5 V to 40 V

module that combines a 15-W DC/DC converter with

• Output Adjustable from –3.0 V to –17 V

a shielded inductor, and passives into a low profile,

QFN package. This total power solution allows as few

• Supplies up to 2-A of Output Current

as five external components and eliminates the loop

• 45-V Surge Capability

compensation and magnetics part selection process.

• Synchronizes to an External Clock

The 9x11x2.8 mm QFN package is easy to solder

• Adjustable Slow-Start

onto a printed circuit board and allows a compact

• Programmable Undervoltage Lockout (UVLO)

design with fewer components and excellent power

dissipation capability. The LMZ34002 offers the

• Output Overcurrent Protection

flexibility and the feature-set of a discrete design and

• Over Temperature Protection

is ideal for powering a wide range of ICs and analog

• Operating Temperature Range: –40°C to 85°C

circuits requiring a negative output voltage. Advanced

packaging technology affords a robust and reliable

• Enhanced Thermal Performance: 14°C/W

power solution compatible with standard QFN

• Meets EN55022 Class B Emissions

mounting and testing techniques.

- Integrated Shielded Inductor

• For Design Help visit

SIMPLIFIED APPLICATION

http://www.ti.com/LMZ34002

APPLICATIONS

• Industrial and Motor Controls

• Automated Test Equipment

• Bipolar Amplifiers in Audio/Video

• High Density Power Systems

Safe Operating Current

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (31 pages)

PAGE 1
LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 2A, Negative Output, SIMPLE SWITCHER® Power Module with 4.5V-40V Input in QFN Package Check for Samples: LMZ34002 FEATURES 1 • • • • • • • • • • • • • • Complete Integrated Power Solution Allows Small Footprint, Low-Profile Design Wide Input Voltage Range from 4.5 V to 40 V Output Adjustable from –3.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating temperature range (unless otherwise noted) Input Voltage Output Voltage MIN MAX UNIT VIN –0.3 45 V INH/UVLO –0.3 5 (2) V VADJ –0.3 3 (2) V SS –0.3 3 (2) V STSEL –0.3 3 (2) V (2) V RT –0.3 3.6 CLK –0.3 3.6 (2) V PH –0.6 45 V –2 45 V PH 10ns Transient VOUT –0.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 ELECTRICAL CHARACTERISTICS -40°C ≤ TA ≤ +85°C, VIN = 12 V, VOUT = –5.0 V, IOUT = 2.0A CIN = 2 x 2.2 µF ceramic, COUT = 2 x 47 µF ceramic (unless otherwise noted) MAX UNIT IOUT Output current PARAMETER Over input voltage and output voltage range 0 (1) 2.0 (2) A VIN Input voltage range Over output current range 4.5 40 (3) V UVLO VIN Undervoltage lockout Rising only, RUVLO1 = 174 kΩ, RUVLO2 = 63.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com THERMAL INFORMATION LMZ34002 THERMAL METRIC (1) RKG UNIT 41 PINS Junction-to-ambient thermal resistance (2) θJA 14 (3) ψJT Junction-to-top characterization parameter ψJB Junction-to-board characterization parameter (4) (1) (2) (3) (4) 3.3 °C/W 6.8 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 PIN DESCRIPTIONS TERMINAL NAME VIN DESCRIPTION NO. 26 Input voltage. This pin supplies all power to the converter. Connect this pin to the input supply and connect bypass capacitors between this pin and GND. 16 17 VOUT 18 19 Negative output voltage with respect to GND. Connect these pins to the output load and connect external bypass capacitors between these pins and GND.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 TYPICAL CHARACTERISTICS (VIN = 5 V) 50 95 45 Output Voltage Ripple (mV) 100 Efficiency (%) 90 85 80 75 70 65 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 800 kHz VO = –3.3 V, fsw = 800 kHz 60 55 50 0 0.2 0.4 0.6 Output Current (A) 0.8 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 800 kHz VO = –3.3 V, fsw = 800 kHz 40 35 30 25 20 15 10 5 1 0 0 0.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com TYPICAL CHARACTERISTICS (VIN = 12 V) 50 95 45 Output Voltage Ripple (mV) 100 Efficiency (%) 90 85 80 75 70 65 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 800 kHz VO = –3.3 V, fsw = 800 kHz 60 55 50 0 0.3 0.6 0.9 1.2 Output Current (A) 1.5 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 800 kHz VO = –3.3 V, fsw = 800 kHz 40 35 30 25 20 15 10 5 0 1.8 0 0.3 0.6 0.9 1.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 TYPICAL CHARACTERISTICS (VIN = 24 V) 50 95 45 Output Voltage Ripple (mV) 100 Efficiency (%) 90 85 80 75 70 65 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 500 kHz VO = –3.3 V, fsw = 500 kHz 60 55 50 0 0.4 0.8 1.2 Output Current (A) 1.6 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 500 kHz VO = –3.3 V, fsw = 500 kHz 40 35 30 25 20 15 10 5 0 2 0 0.4 0.8 1.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com TYPICAL CHARACTERISTICS (VIN = 36 V) 50 95 45 Output Voltage Ripple (mV) 100 Efficiency (%) 90 85 80 75 70 65 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 500 kHz VO = –3.3 V, fsw = 500 kHz 60 55 50 0 0.4 0.8 1.2 Output Current (A) 1.6 VO = –15 V, fsw = 800 kHz VO = –12 V, fsw = 800 kHz VO = –5.0 V, fsw = 500 kHz VO = –3.3 V, fsw = 500 kHz 40 35 30 25 20 15 10 5 0 2 0 0.4 G000 Figure 19. Efficiency vs.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 40 120 30 90 30 90 20 60 20 60 10 30 10 30 0 0 0 0 Gain Phase −40 1000 10000 Frequency (kHz) 100000 −60 −20 −90 −30 −120 300000 −40 1000 100000 −120 300000 G000 Figure 26. VIN= 5 V, VOUT= –12 V, IOUT= 0.3 A, COUT= 4 x 22 µF ceramic, fSW= 800 kHz 120 40 120 30 90 30 90 20 60 20 60 10 30 10 30 0 0 0 0 −30 −10 −60 −20 −30 Gain (dB) 40 Phase (°) Gain (dB) −90 10000 Frequency (kHz) G000 Figure 25.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com (continued) 40 120 30 90 30 90 20 60 20 60 10 30 10 30 0 0 0 0 −30 −10 −60 −20 −30 Gain Phase −40 1000 100000 −30 −10 −60 −20 −90 10000 Frequency (kHz) Gain (dB) 120 Gain Phase −30 −120 300000 −40 1000 −90 10000 Frequency (kHz) G000 Figure 31. VIN= 36 V, VOUT= –5 V, IOUT= 2.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Table 1. Recommended Input/Output Capacitors (1) CAPACITOR CHARACTERISTICS VENDOR SERIES PART NUMBER WORKING VOLTAGE (V) CAPACITANCE (µF) ESR (2) (mΩ) Murata X5R GRM31CR61H225KA88L 50 2.2 2 TDK X5R C3216X5R1H475K 50 4.7 2 Murata X5R GRM32ER61E226K 16 22 2 TDK X5R C3225X5R0J476K 6.3 47 2 Murata X5R GRM32ER60J476M 6.3 47 2 Sanyo POSCAP 16TQC68M 16 68 50 Sanyo POSCAP 6TPE100MI 6.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com APPLICATION INFORMATION Adjusting the Output Voltage The LMZ34002 is designed to provide output voltages from –3 V to –17 V. The output voltage is determined by the value of RSET, which must be connected between the VADJ pin (Pin 36) and GND. Table 2 gives the standard external RSET resistor for a number of common bus voltages. Table 2. Standard RSET Resistor Values for Common Output Voltages OUTPUT VOLTAGE VOUT (V) –3.3 –5.0 –8.0 –12.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Application Schematics VIN 24 V VOUT –12 V @ 1.25 A LMZ34002 VOUT VIN VOUT_PT 4.7 F 50 V 174 kΩ 47 F 16 V A_VOUT INH/UVLO 47 F 16 V RT STSEL 11.5 kΩ VADJ GND 140 kΩ Figure 34. Typical Schematic VIN = 24 V, VOUT = –12 V VIN 12 V VOUT –5 V @ 1.5 A LMZ34002 VOUT VIN VOUT_PT 4.7 F 25 V 174 kΩ 47 F 6.3 V A_VOUT INH/UVLO 47 F 6.3 V RT STSEL 24.3 kΩ VADJ GND 52.3kΩ Figure 35.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com Input Voltage The LMZ34002 operates over the input voltage range of 4.5 V to 40 V. The maximum input voltage is 40 V, however, the sum of VIN + |VOUT| must not exceed 50 V. See the Undervoltage Lockout (UVLO) Threshold section of this datasheet for more information. Undervoltage Lockout (UVLO) Threshold At turn-on, the VON UVLO threshold determines the input voltage level where the device begins power conversion.
PAGE 17
LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Power-Up Characteristics When configured as shown in the application schematics, the LMZ34002 produces a regulated output voltage following the application of a valid input voltage. During the power-up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source.
PAGE 18
LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com Switching Frequency The recommended switching frequency of the LMZ34002 is 800 kHz. To operate at the recommended switching frequency, connect the RT pin (Pin 30) to A_VOUT (at pin 32). It is recommended to adjust the switching frequency in applications with both, higher input voltage (> 18V) and lower output voltage (< –8V).
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Output On/Off Inhibit (INH) The INH pin provides electrical on/off control of the device. Once the INH pin voltage exceeds the threshold voltage, the device starts operation. If the INH pin voltage is pulled below the threshold voltage, the regulator stops switching and enters low quiescent current state. The INH pin has an internal pull-up current source, allowing the user to float the INH pin for enabling the device.
PAGE 20
LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com Slow-Start Circuit (SS) Connecting the STSEL pin (Pin 29) to A_VOUT while leaving SS pin (Pin 28) open, enables the internal SS capacitor with a slow-start interval of approximately 10 ms. Adding additional capacitance between the SS pin and A_VOUT increases the slow-start time. Figure 45 shows an additional SS capacitor connected to the SS pin and the STSEL pin connected to A_VOUT. See Table 6 below for SS capacitor values and timing interval.
PAGE 21
LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Input to Output Coupling Capacitor Adding an input to output coupling capacitor (CIO) across VIN to VOUT as shown in Figure 46 can help reduce output voltage ripple and improve transient response. A typical value for CIO is 2.2 µF ceramic with a voltage rating greater than the sum of VIN + |VOUT|. CIO LMZ34002 VIN VIN -VOUT VOUT CIN COUT Figure 46.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com Layout Considerations To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 47 through Figure 50 show four layers of a typical PCB layout. Some considerations for an optimized layout are: • Use large copper areas for power planes (VIN, VOUT, and GND) to minimize conduction loss and thermal stress. • Place ceramic input and output capacitors close to the module pins to minimize high frequency noise.
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LMZ34002 www.ti.com SNVS989A – JULY 2013 – REVISED SEPT 2013 Figure 49. Typical VOUT-Layer Recommended Layout Figure 50. Typical Bottom-Layer Recommended Layout EMI The LMZ34002 complies with EN55022 Class B radiated emissions. Figure 51 shows a typical example of radiated emissions plots for the LMZ34002. The graph includes the plot of the antenna in the horizontal and vertical positions. Figure 51.
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LMZ34002 SNVS989A – JULY 2013 – REVISED SEPT 2013 www.ti.com Changes from Original (JULY 2013) to Revision A • 24 Page Changed incorrect RSET value for -5.5 VOUT in Table 3. .....................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 20-Feb-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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