Datasheet

PVIN
LMZ31704
INH/UVLO
SS/TR
VIN
V
IN
= 12V
V
O
= 1.8V
RT/CLK
VADJ
R
SET
22µF
220µF
100µF
330µF
715 Ω
PVIN
VIN
100µF
ISHARE
INH/UVLO
SS/TR
RT/CLK
VADJ
ISHARE
Sync Freq
500KHz
LMZ31704
R
RT
R
RT
169kΩ
169kΩ
INH
Control
Voltage
Supervisor
5V
VOUT
SENSE+
PWRGD
C
SS
AGND
PGND
STSEL
VOUT
SENSE+
PWRGD
C
SH
100µF
100µF
SYNC_OUT
SYNC_OUT
AGND
PGND
STSEL
0.1µF
22µF
0.1µF
LMZ31704
www.ti.com SLVSBV8A –JUNE 2013–REVISED AUGUST 2013
Parallel Operation
Up to six LMZ31704 devices can be paralleled for increased output current. Multiple connections must be made
between the paralleled devices and the component selection is slightly different than for a stand-alone
LMZ31704 device. A typical LMZ31704 parallel schematic is shown in Figure 24. Refer to application note,
SNVA695 for information and design help when paralleling multiple LMZ31704 devices.
Figure 24. Typical LMZ31704 Parallel Schematic
Light Load Efficiency (LLE)
The LMZ31704 operates in pulse skip mode at light load currents to improve efficiency and decrease power
dissipation by reducing switching and gate drive losses.
These pulses may cause the output voltage to rise when there is no load to discharge the energy. For output
voltages < 1.5 V, a minimum load is required. The amount of required load can be determined by Equation 2. In
most cases the minimum current drawn by the load circuit will be enough to satisfy this load. Applications
requiring a load resistor to meet the minimum load, the added power dissipation will be ≤ 3.6 mW. A single 0402
size resistor across VOUT and PGND can be used.
(2)
When V
OUT
= 0.6 V and R
SET
= OPEN, the minimum load current is 600 µA.
Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LMZ31704