Datasheet

SS_SEL

PGND

PWRGD

SS_SEL

PGND

PWRGD

LMZ31520

SLVSBM9B –OCTOBER 2013–REVISED DECEMBER 2013

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VIN and PVIN Input Voltage

The LMZ31520 allows for a variety of applications by using the VIN and PVIN pins together or separately. The

VIN voltage supplies the internal control circuits of the device. The PVIN voltage provides the input voltage to the

power converter system.

If tied together, the input voltage for the VIN pin and the PVIN pin can range from 4.5 V to 14.5 V. If using the

VIN pin separately from the PVIN pin, the VIN pin must be greater than 4.5 V, and the PVIN pin can range from

as low as 3.0 V to 14.5 V. When operating from a split rail, it is recommended to supply VIN from 5 V to 12 V, for

best performance.

3.3 V PVIN Operation

Applications operating from a PVIN of 3.3 V must provide at least 4.5 V for VIN. It is recommended to supply VIN

from 5 V to 12 V, for best performance. See application note, SNVA692 for help creating 5 V from 3.3 V using a

small, simple charge pump device.

Power Good (PWRGD)

The PWRGD pin is an open drain output. Once the voltage on the SENSE+ pin is between 90% and 115% of the

set voltage, the PWRGD pin pull-down is released and the pin floats. The recommended pull-up resistor value is

between 10 kΩ and 100 kΩ to a voltage source that is less than 7 V. An internal 100 kΩ pull-up resistor is

provided internal to the device between the PWRGD pin (pin 19) and PWRGD_PU pin (pin 18). The

PWRGD_PU pin can be connected to a voltage source less than 7 V or connected directly to V5V (pin 61), which

is an internal 5V regulator. The PWRGD pin is in a defined state once VIN is greater than 1.0 V. The PWRGD

pin is pulled low when the voltage on SENSE+ is lower than 90% or greater than 115% of the nominal set

voltage. Also, the PWRGD pin is pulled low if the input UVLO or thermal shutdown is asserted or the INH pin is

pulled low.

Slow Start (SS_SEL)

Connecting the SS_SEL pin to PWRGD or PGND sets the slow start interval of approximately 0.7 ms. The

connection to either PWRGD or PGND determines the mode of the LMZ31520 as decribed in Auto-Skip Eco-

Mode ™ / Forced Continuous Conduction Mode. Adding a resistor between SS_SEL pin and PWRGD or PGND

increases the slow start time. Increasing the slow start time will reduce inrush current.Table 5 shows a resistor

connected between SS_SEL pin and PWRGD to select FCCM and Figure 17 shows a resistor between SS_SEL

pin and PGND to select Auto-skip mode. See Table 5 below for SS resistor values and timing interval.

Figure 16. Slow-Start Resistor (R

) in FCCM Figure 17. Slow-Start Resistor (R

) in Auto-skip

Mode

Table 5. Slow-Start Resistor Values and Slow-Start Time

(kΩ) short 61.9 161 436

SS Time (msec) 0.7 1.4 2.8 5.6

Product Folder Links: LMZ31520