Datasheet

AGND
VOUT
PGND
R
SET
R
RT
C
OUT1
SENSE+
Via
SENSE+
Via
C
IN1
VIN
PH
Vias to
PGND
Layer
Vias to
PGND
Layer
PGND
Plane
SENSE+
Via
SENSE+
Via
Vias to
Topside
PGND
Copper
Vias to
Topside
AGND
Copper
LMZ30602
www.ti.com SNVS997 –JULY 2013
Layout Considerations
To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 36, shows a
typical PCB layout. Some considerations for an optimized layout are:
• Use large copper areas for power planes (VIN, VOUT, and PGND) to minimize conduction loss and thermal
stress.
• Place ceramic input and output capacitors close to the module pins to minimize high frequency noise.
• Locate additional output capacitors between the ceramic capacitor and the load.
• Place a dedicated AGND copper area beneath the LMZ30602.
• Connect the AGND and PGND copper area at one point; directly at the pin 37 PowerPad using multiple vias.
• Place R
SET
, R
RT
, and C
SS
as close as possible to their respective pins.
• Use multiple vias to connect the power planes to internal layers.
Figure 36. Typical Top-Layer Recommended Figure 37. Typical PGND-Layer Recommended
Layout Layout
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