Datasheet

LMZ23610
www.ti.com SNVS707E –MARCH 2011–REVISED OCTOBER 2013
ADDITIONAL FEATURES
SYNCHRONIZATION INPUT
The PWM switching frequency can be synchronized to an external frequency source. The PWM switching will be
in phase with the external frequency source. If this feature is not used, connect this input either directly to
ground, or connect to ground through a resistor of 1.5 kΩ ohm or less. The allowed synchronization frequency
range is 314 kHz to 600 kHz. The typical input threshold is 1.4V. Ideally, the input clock should overdrive the
threshold by a factor of 2, so direct drive from 3.3V logic via a 1.5k Ω or less Thevenin source resistance is
recommended. Note that applying a sustained “logic 1” corresponds to zero Hz PWM frequency and will cause
the module to stop switching.
CURRENT SHARING
When a load current higher than 10A is required by the application, the LMZ23610 can be configured to share
the load between multiple devices. To share the load current between the devices, connect the SH pin of all
current sharing LMZ23610 modules. One device should be configured as the master by connecting FB normally.
All other devices should be configured as slaves by leaving their respective FB pins floating. The modules should
be synchronized by a clock signal to avoid beat frequencies in the output voltage caused by small differences in
the internal 359 kHz clock. If the modules are not synchronized, the magnitude of the ripple voltage will depend
on the phase relationship of the internal clocks. The external synchronizing clocks can be in phase for all
modules, or out of phase to reduce the current stress on the input and output capacitors. As an example, two
modules can be run 180 degrees out of phase, and three modules can be run 120 degrees out of phase. The
VIN, VOUT, PGND, and AGND pins should also be connected with low impedance paths. It is particularly
important to pay close attention to the layout of AGND and SH, as offsets in grounding or noise picked up from
other devices will be seen as a mismatch in current sharing and could cause noise issues.
Current sharing modules can be configured to share the same set of bulk input and output capacitors, while each
having their own local input and output bypass capacitors. A C
IN_BYP
>= 30uF is still recommended for each
module that is connected in a current sharing configuration. A C
OUT_BYP
consisting of 47nF X7R ceramic
capacitor in parallel with a 22µF ceramic capacitor is recommended to locally bypass the output voltage for each
module. These capacitors will provide local bypassing of high frequency switched currents.
In a current sharing system using two or more modules, the slaves have their error amp circuitry disconnected.
The master over-rides the error amplifier outputs of the slaves. This signal is then compared to each module’s
individual current sense circuitry. Due to this, the current sense gain of the entire system increases according to
the number of modules slaved to the master. To compensate for this and ensure good stability, the total output
capacitance has to be increased. For example, two modules configured to provide 1.2V
OUT
and 20 amps have a
required total bulk output capacitance of C
OUT_BULK
= 2 x 450µF (ESR 25mOhms). This is a thirty six percent
increase in the required output capacitance of a stand alone module. Up to 6 modules can be connected in
parallel for loads up to 60A. For more information on current sharing refer to AN-2093 LMZ23610/8/6 and
LMZ22010/8/6 Current Sharing Evaluation Board (literature number SNVA460).
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