Datasheet

LMZ23605
www.ti.com SNVS659H –MARCH 2011–REVISED OCTOBER 2013
ADDITIONAL FEATURES
SYNCHRONIZATION INPUT
The PWM switching frequency can be synchronized to an external frequency source. If this feature is not used,
connect this input either directly to ground, or connect to ground through a resistor of 1.5 kΩ ohm or less. The
allowed synchronization frequency range is 650kHz to 950 kHz. The typical input threshold is 1.4V transition
level. Ideally the input clock should overdrive the threshold by a factor of 2, so direct drive from 3.3V logic via a
1.5kΩ Thevenin source resistance is recommended. Note that applying a sustained “logic 1” corresponds to zero
hertz PWM frequency and will cause the module to stop switching.
OUTPUT OVER-VOLTAGE PROTECTION
If the voltage at FB is greater than a 0.86V internal reference, the output of the error amplifier is pulled toward
ground, causing V
O
to fall.
CURRENT LIMIT
The LMZ23605 is protected by both low side (LS) and high side (HS) current limit circuitry. The LS current limit
detection is carried out during the off-time by monitoring the current through the LS synchronous MOSFET.
Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows
through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 5.4A (typical) the
current limit comparator disables the start of the next switching period. Switching cycles are prohibited until
current drops below the limit. It should also be noted that d.c. current limit is dependent on both duty cycle as
illustrated in the graph in the TYPICAL PERFORMANCE CHARACTERISTICS section. The HS current limit
monitors the current of top side MOSFET. Once HS current limit is detected (7A typical) , the HS MOSFET is
shut off immediately, until the next cycle. Exceeding HS current limit causes V
O
to fall. Typical behavior of
exceeding LS current limit is that f
SW
drops to 1/2 of the operating frequency.
THERMAL PROTECTION
The junction temperature of the LMZ23605 should not be allowed to exceed its maximum ratings. Thermal
protection is implemented by an internal Thermal Shutdown circuit which activates at 165 °C (typ) causing the
device to enter a low power standby state. In this state the main MOSFET remains off causing V
O
to fall, and
additionally the C
SS
capacitor is discharged to ground. Thermal protection helps prevent catastrophic failures for
accidental device overheating. When the junction temperature falls back below 150 °C (typ Hyst = 15°C) the SS
pin is released, V
O
rises smoothly, and normal operation resumes.
Applications requiring maximum output current especially those at high input voltage may require additional
derating at elevated temperatures.
PRE-BIASED STARTUP
The LMZ23605 will properly start up into a pre-biased output. This startup situation is common in multiple rail
logic applications where current paths may exist between different power rails during the startup sequence. The
following scope capture shows proper behavior in this mode. Trace one is Enable going high. Trace two is 1.5V
pre-bias rising to 3.3V. Risetime determined by C
SS
, trace three.
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