Datasheet
1.07k
Rfbb
2.26k
Rfbt
107
Rtkb
226
Rtkt
SS/TRK
3.3V Master
FB
2.5Vout
50 PA
Int VCC
LMZ23605
SNVS659H –MARCH 2011–REVISED OCTOBER 2013
www.ti.com
This equation can be rearranged as follows:
C
SS
= t
SS
* 50μA / 0.796V (7)
Using a 0.22μF capacitor results in 3.5 msec typical soft-start duration; and 0.47μF results in 7.5 msec typical.
0.47 μF is a recommended initial value.
As the soft-start input exceeds 0.796V the output of the power stage will be in regulation and the 50 μA current is
deactivated. Note that the following conditions will reset the soft-start capacitor by discharging the SS input to
ground with an internal current sink.
• The Enable input being pulled low
• Thermal shutdown condition
• Internal Vcc UVLO (Approx 4.3V input to V
IN
)
TRACKING SUPPLY DIVIDER OPTION
The tracking function allows the module to be connected as a slave supply to a primary voltage rail (often the
3.3V system rail) where the slave module output voltage is lower than that of the master. Proper configuration
allows the slave rail to power up coincident with the master rail such that the voltage difference between the rails
during ramp-up is small (i.e. <0.15V typ). The values for the tracking resistive divider should be selected such
that the effect of the internal 50uA current source is minimized. In most cases the ratio of the tracking divider
resistors is the same as the ratio of the output voltage setting divider. Proper operation in tracking mode dictates
the soft-start time of the slave rail be shorter than the master rail; a condition that is easy satisfy since the C
SS
cap is replaced by R
TKB
. The tracking function is only supported for the power up interval of the master supply;
once the SS/TRK rises past 0.8V the input is no longer enabled and the 50 uA internal current source is switched
off.
Figure 49. Tracking option input detail
C
O
SELECTION
None of the required C
O
output capacitance is contained within the module. A minimum value of 200 μF is
required based on the values of internal compensation in the error amplifier. Low ESR tantalum, organic
semiconductor or specialty polymer capacitor types are recommended for obtaining lowest ripple. The output
capacitor C
O
may consist of several capacitors in parallel placed in close proximity to the module. The output
capacitor assembly must also meet the worst case minimum ripple current rating of 0.5 * I
LR P-P
, as calculated in
Equation 16 below. Beyond that, additional capacitance will reduce output ripple so long as the ESR is low
enough to permit it. Loop response verification is also valuable to confirm closed loop behavior.
For applications with dynamic load steps; the following equation provides a good first pass approximation of C
O
for load transient requirements. Where V
O-Tran
is 100mV on a 3.3V output design.
C
O
≥I
O-Tran
*/((V
O-Tran
– ESR * I
O-Tran
)*(Fsw / V
O
) (8)
Solving:
C
O
≥ 4.5A / ((0.1V – .007*4.5) * ( 800000 / 3.3) ≥ 271μF (9)
Note that the stability requirement for 200 µF minimum output capacitance will take precedence.
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