Datasheet

1 3
FB
1
2 3
Linear
Regulator
2M
3.3 uH
CBST
EN
AGND
Regulator IC
CSS
Internal Passives
VOUT
CINint
C
O
SYNC
EP/
PGND
Comp
C
IN
RFBB
SS/TRK
VREF
1
2 3
VIN
800 kHz
PWM
RFBT
LMZ23605
SNVS659H –MARCH 2011–REVISED OCTOBER 2013 www.ti.com
BLOCK DIAGRAM
DESIGN STEPS FOR THE LMZ23605 APPLICATION
The LMZ23605 is fully supported by WEBENCH which offers: component selection, electrical and thermal
simulations. Additionally there are both evaluation and demonstration boards that may be used as a starting point
for design. The following list of steps can be used to manually design the LMZ23605 application.
All references to values refer to the Typical Application Schematic Diagram.
• Select minimum operating V
IN
with enable divider resistors
• Program V
O
with resistor divider selection
• Select C
O
• Select C
IN
• Determine module power dissipation
• Layout PCB for required thermal performance
ENABLE DIVIDER, R
ENT
, R
ENB
AND R
ENH
SELECTION
Internal to the module is a 2 mega ohm pull-up resistor connected from V
IN
to Enable. For applications not
requiring precision under voltage lock out (UVLO), the Enable input may be left open circuit and the internal
resistor will always enable the module. In such case, the internal UVLO occurs typically at 4.3V (V
IN
rising).
In applications with separate supervisory circuits Enable can be directly interfaced to a logic source. In the case
of sequencing supplies, the divider is connected to a rail that becomes active earlier in the power-up cycle than
the LMZ23605 output rail.
Enable provides a precise 1.279V threshold to allow direct logic drive or connection to a voltage divider from a
higher enable voltage such as V
IN
. Additionally there is 21 μA(typ) of switched offset current allowing
programmable hysteresis. See Figure 48.
The function of the enable divider is to allow the designer to choose an input voltage below which the circuit will
be disabled. This implements the feature of programmable UVLO. The two resistors should be chosen based on
the following ratio:
R
ENT
/ R
ENB
= (V
IN UVLO
/ 1.279V) – 1 (1)
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