Datasheet
LMZ22010
SNVS687G –MARCH 2011–REVISED OCTOBER 2013
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2. Have a single point ground.
The ground connections for the feedback, soft-start, and enable components should be routed to the AGND pin
of the device. This prevents any switched or load currents from flowing in the analog ground traces. If not
properly handled, poor grounding can result in degraded load regulation or erratic output voltage ripple behavior.
Additionally provide a single point ground connection from pin 4 (AGND) to EP/PGND.
3. Minimize trace length to the FB pin.
Both feedback resistors, R
FBT
and R
FBB
should be located close to the FB pin. Since the FB node is high
impedance, maintain the copper area as small as possible. The traces from R
FBT
, R
FBB
should be routed away
from the body of the LMZ22010 to minimize possible noise pickup.
4. Make input and output bus connections as wide as possible.
This reduces any voltage drops on the input or output of the converter and maximizes efficiency. To optimize
voltage accuracy at the load, ensure that a separate feedback voltage sense trace is made to the load. Doing so
will correct for voltage drops and provide optimum output accuracy.
5. Provide adequate device heat-sinking.
Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If
the PCB has multiple copper layers, these thermal vias can also be connected to inner layer heat-spreading
ground planes. For best results use a 10 x 10 via array or larger with a minimum via diameter of 8mil thermal
vias spaced 46.8mil (1.5 mm). Ensure enough copper area is used for heat-sinking to keep the junction
temperature below 125°C.
Additional Features
SYNCHRONIZATION INPUT
The PWM switching frequency can be synchronized to an external frequency source. The PWM switching will be
in phase with the external frequency source. If this feature is not used, connect this input either directly to
ground, or connect to ground through a resistor of 1.5 kΩ ohm or less. The allowed synchronization frequency
range is 314 kHz to 600 kHz. The typical input threshold is 1.4V. Ideally, the input clock should overdrive the
threshold by a factor of 2, so direct drive from 3.3V logic via a 1.5k Ω or less Thevenin source resistance is
recommended. Note that applying a sustained “logic 1” corresponds to zero Hz PWM frequency and will cause
the module to stop switching.
CURRENT SHARING
When a load current higher than 10A is required by the application, the LMZ22010 can be configured to share
the load between multiple devices. To share the load current between the devices, connect the SH pin of all
current sharing LMZ22010 modules. One device should be configured as the master by connecting FB normally.
All other devices should be configured as slaves by leaving their respective FB pins floating. The modules should
be synchronized by a clock signal to avoid beat frequencies in the output voltage caused by small differences in
the internal 359 kHz clock. If the modules are not synchronized, the magnitude of the ripple voltage will depend
on the phase relationship of the internal clocks. The external synchronizing clocks can be in phase for all
modules, or out of phase to reduce the current stress on the input and output capacitors. As an example, two
modules can be run 180 degrees out of phase, and three modules can be run 120 degrees out of phase. The
VIN, VOUT, PGND, and AGND pins should also be connected with low impedance paths. It is particularly
important to pay close attention to the layout of AGND and SH, as offsets in grounding or noise picked up from
other devices will be seen as a mismatch in current sharing and could cause noise issues.
Current sharing modules can be configured to share the same set of bulk input and output capacitors, while each
having their own local input and output bypass capacitors. A C
IN_BYP
>= 30uF is still recommended for each
module that is connected in a current sharing configuration. A C
OUT_BYP
consisting of 47nF X7R ceramic
capacitor in parallel with a 22µF ceramic capacitor is recommended to locally bypass the output voltage for each
module. These capacitors will provide local bypassing of high frequency switched currents.
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