Datasheet

LMZ22010
www.ti.com SNVS687G –MARCH 2011–REVISED OCTOBER 2013
DESIGN STEPS FOR THE LMZ22010 APPLICATION
The LMZ22010 is fully supported by Webench® which offers: component selection, electrical and thermal
simulations. Additionally, there are both evaluation and demonstration boards that may be used as a starting
point for design. The following list of steps can be used to manually design the LMZ22010 application.
All references to values refer to the typical applications schematic Figure 58.
• Select minimum operating V
IN
with enable divider resistors
• Program V
OUT
with FB resistor divider selection
• Select C
OUT
• Select C
IN
• Determine module power dissipation
• Layout PCB for required thermal performance
ENABLE DIVIDER, R
ENT
, R
ENB
AND R
ENH
SELECTION
Internal to the module is a 2 mega ohm pull-up resistor connected from V
IN
to Enable. For applications not
requiring precision under voltage lock out (UVLO), the Enable input may be left open circuit and the internal
resistor will always enable the module. In such case, the internal UVLO occurs typically at 4.3V (V
IN
rising).
In applications with separate supervisory circuits Enable can be directly interfaced to a logic source. In the case
of sequencing supplies, the divider is connected to a rail that becomes active earlier in the power-up cycle than
the LMZ22010 output rail.
Enable provides a precise 1.274V threshold to allow direct logic drive or connection to a voltage divider from a
higher enable voltage such as V
IN
. Additionally there is 13 μA (typ) of switched offset current allowing
programmable hysteresis. See Figure 50.
The function of the enable divider is to allow the designer to choose an input voltage below which the circuit will
be disabled. This implements the feature of a programmable UVLO. The two resistors should be chosen based
on the following ratio:
R
ENT
/ R
ENB
= (V
IN UVLO
/ 1.274V) – 1 (1)
The LMZ22010 typical application shows 12.7kΩ for R
ENB
and 42.2kΩ for R
ENT
resulting in a rising UVLO of
5.51V. Note that this divider presents 4.62V to the EN input when V
IN
is raised to 20V. This upper voltage should
always be checked, making sure that it never exceeds the Abs Max 5.5V limit for Enable. A 5.1V Zener clamp
can be applied in cases where the upper voltage would exceed the EN input's range of operation. The zener
clamp is not required if the target application prohibits the maximum Enable input voltage from being exceeded.
Additional enable voltage hysteresis can be added with the inclusion of R
ENH
. It is possible to select values for
R
ENT
and R
ENB
such that R
ENH
is a value of zero allowing it to be omitted from the design.
Rising threshold can be calculated as follows:
V
EN
(rising) = 1.274 ( 1 + (R
ENT
|| 2 meg)/ R
ENB
) (2)
Whereas the falling threshold level can be calculated using:
V
EN
(falling) = V
EN
(rising) – 13 µA ( R
ENT
|| 2 meg || R
ENTB
+ R
ENH
) (3)
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