Datasheet

LMZ22005
SNVS686I –MARCH 2011–REVISED OCTOBER 2013 www.ti.com
OUTPUT VOLTAGE SELECTION
Output voltage is determined by a divider of two resistors connected between V
O
and ground. The midpoint of
the divider is connected to the FB input.
The regulated output voltage determined by the external divider resistors R
FBT
and R
FBB
is:
V
O
= 0.8V * (1 + R
FBT
/ R
FBB
) (2)
Rearranging terms; the ratio of the feedback resistors for a desired output voltage is:
R
FBT
/ R
FBB
= (V
O
/ 0.796V) - 1 (3)
These resistors should generally be chosen from values in the range of 1.0 kohm to 10.0 kohm.
For V
O
= 0.8V the FB pin can be connected to the output directly and R
FBB
can be omitted.
A table of values for R
FBT
, and R
FBB
, is included in the applications schematic.
SOFT-START CAPACITOR SELECTION
Programmable soft-start permits the regulator to slowly ramp to its steady state operating point after being
enabled, thereby reducing current inrush from the input supply and slowing the output voltage rise-time.
Upon turn-on, after all UVLO conditions have been passed, an internal 2 mSec circuit slowly ramps the SS/TRK
input to implement internal soft start. If 1.6mSec is an adequate turn–on time then the Css capacitor can be left
unpopulated. Longer soft-start periods are achieved by adding an external capacitor to this input.
Soft start duration is given by the formula:
t
SS
= V
REF
* C
SS
/ Iss = 0.796V * C
SS
/ 50uA (4)
This equation can be rearranged as follows:
C
SS
= t
SS
* 50μA / 0.796V (5)
Using a 0.22μF capacitor results in 3.5 msec typical soft-start duration; and 0.47μF results in 7.5 msec typical.
0.47 μF is a recommended initial value.
Once the soft-start input exceeds 0.796V the output of the power stage will be in regulation and the 50 μA
current is deactivated. Note that the following conditions will reset the soft-start capacitor by discharging the SS
input to ground with an internal current sink.
• The Enable input being pulled low
• Thermal shutdown condition
• Internal Vcc UVLO (Approx 4.3V input to V
IN
)
TRACKING SUPPLY DIVIDER OPTION
The tracking function allows the module to be connected as a slave supply to a primary voltage rail (often the
3.3V system rail) where the slave module output voltage is lower than that of the master. Proper configuration
allows the slave rail to power up coincident with the master rail such that the voltage difference between the rails
during ramp-up is small (i.e. <0.15V typ). The values for the tracking resistive divider should be selected such
that the effect of the internal 50uA current source is minimized. In most cases the ratio of the tracking divider
resistors is the same as the ratio of the output voltage setting divider. Proper operation in tracking mode dictates
the soft-start time of the slave rail be shorter than the master rail; a condition that is easy satisfy since the C
SS
cap is replaced by R
TKB
. The tracking function is only supported for the power up interval of the master supply;
once the SS/TRK rises past 0.8V the input is no longer enabled and the 50 uA internal current source is switched
off.
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