Datasheet
VIN
GND
V
IN
V
O
C
in1
C
O1
Loop 1
Loop 2
LMZ14203H
VOUT
High
di/dt
0 10 20 30 40 50 60
0
5
10
15
20
25
30
35
40
THERMAL RESISTANCE
JA
(°C/W)
BOARD AREA (cm
2
)
0LFM (0m/s) air
225LFM (1.14m/s) air
500LFM (2.54m/s) air
Evaluation Board Area
LMZ14203H
www.ti.com
SNVS692D –JANUARY 2011–REVISED OCTOBER 2013
Using the 85°C T
AMB
power dissipation data as a conservative starting point, the power dissipation P
D
for V
IN
=
24V and V
OUT
= 12V is estimated to be 3.5W. The necessary θ
JA-MAX
can now be calculated.
θ
JA-MAX
< (125°C - 65°C) / 3.5W (24)
θ
JA-MAX
< 17.1°C/W (25)
To achieve this thermal resistance the PCB is required to dissipate the heat effectively. The area of the PCB will
have a direct effect on the overall junction-to-ambient thermal resistance. In order to estimate the necessary
copper area we can refer to Figure 54. This graph is taken from the TYPICAL PERFORMANCE
CHARACTERISTICS section (Figure 37) and shows how the θ
JA
varies with the PCB area.
Figure 54. Package Thermal Resistance θ
JA
4 Layer Printed Circuit Board with 1oz Copper
For θ
JA-MAX
< 17.1°C/W and only natural convection (i.e., no air flow), the PCB area will have to be at least 52cm
2
.
This corresponds to a square board with 7.25cm x 7.25cm (2.85in x 2.85in) copper area, 4 layers, and 1oz
copper thickness. Higher copper thickness will further improve the overall thermal performance. As a reference,
the evaluation board has 2oz copper on the top and bottom layers, achieving θ
JA
of 14.9°C/W for the same board
area. Note that thermal vias should be placed under the IC package to easily transfer heat from the top layer of
the PCB to the inner layers and the bottom layer.
For more guidelines and insight on PCB copper area, thermal vias placement, and general thermal design
practices see the application note, AN-2020 Thermal Design By Insight, Not Hindsight (SNVA419).
PC BOARD LAYOUT GUIDELINES
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce and resistive voltage drop
in the traces. These can send erroneous signals to the DC-DC converter resulting in poor regulation or instability.
Good layout can be implemented by following a few simple design rules.
Figure 55. PC Board Layout
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LMZ14203H