Datasheet
Exposed Pad
Connect to GND
5
FB
6
VOUT
3
SS
1
VIN
2
EN
4
GND
7
VOUT
VIN
EN
GND
FB
VOUT
LMZ10505EXT
V
IN
V
OUT
SS
C
in
C
O
R
fbt
R
comp
C
comp
R
fbb
C
SS
1
2
3
4, EP
5
6, 7
LMZ10505EXT
www.ti.com
SNVS669G –JUNE 2010–REVISED OCTOBER 2013
Typical Application Circuit
Connection Diagram
Figure 2. Top View
7-Lead PFM
PIN DESCRIPTIONS
Pin Number Name Description
1 VIN A low ESR input capacitance should be located as close as possible to VIN pin and GND pin.
2 EN Active high enable input for the device.
3 SS Soft-start control pin. An internal 2 uA current source charges and external capacitor connected between this
pin and GND (pin 4) to set the output voltage ramp rate during startup. This pin can also be used to configure
the tracking feature.
4 GND Power ground and signal ground. Connect the bottom feedback resistor between this pin and the feedback
pin.
5 FB Feedback pin. This is the inverting input of the error amplifier used for sensing the output voltage.
6, 7 VOUT This is the output of the internal inductor. Connect an external resistor voltage divider from VOUT to FB to
ground.
EP Exposed Exposed pad thermal connection. Connect this pad to the PC board ground plane in order to reduce thermal
Pad resistance value. It also provides an electrical connection to the input and output capacitors ground terminals.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
VIN, VOUT, EN, FB, SS to GND -0.3V to 6.0V
ESD Susceptibility
(2)
±2 kV
Power Dissipation Internally Limited
Junction Temperature 150°C
Storage Temperature Range -65°C to 150°C
Peak Reflow Case Temperature (30 sec) 245°C
For soldering specifications, refer to the following document: www.ti.com/lit/snoa549c
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.
(2) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD22-AI14S.
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LMZ10505EXT