Datasheet

LMX2541SQ2060E, LMX2541SQ2380E
LMX2541SQ2690E, LMX2541SQ3030E
LMX2541SQ3320E, LMX2541SQ3740E
SNOSB31I –JULY 2009–REVISED FEBRUARY 2013 www.ti.com
Fractional Spurs
Primary Fractional Spurs
The primary fractional spurs occur at multiples of the channel spacing and can change based on the fraction. For
instance, if the phase detector frequency is 10 MHz, and the channel spacing is 100 kHz, then this could be
achieved using a fraction of 1/100. The fractional spurs would be at offsets that are multiples 100 kHz.
Sub-Fractional Spurs
Sub-fractional spurs occur at sub-multiples of the channel spacing, Fch. For instance, in the above example,
there could be a sub-fractional spur at 50 kHz. The occurrence of these spurs is dependent on the modulator
order. Integer mode and the first order modulator never have sub-fractional spurs. If the fractional denominator
can be chosen to avoid factors of 2 or 3, then there will also be no sub-fractional spurs. Sub-fractional spurs get
worse for higher order modulators. Dithering tends to reduce sub-fractional spurs at the expense of increasing
PLL phase noise. The following table provides guidance on predicting sub-fractional spur offset frequencies.
Table 9. Sub-Fractional Spur Offset Frequencies vs. Modulator Order and Fractional Denominator Factors
Fractional Denominator Factors
ORDER
No Factor of 2 or 3 Factor of 2 but not 3 Factor of 3 but not 2 Factor of 2 and 3
Integer Mode None None None None
1st Order Modulator None None None None
2nd Order Modulator None Fch/2 None Fch/2
3rd Order Modulator None Fch/2 Fch/3 Fch/6
4th Order Modulator None Fch/4 Fch/3 Fch/12
Impact of VCO_DIV on Fractional spurs
Because the fractional and sub-fractional spur levels do not depend on output frequency, there is a big benefit to
division. In general, every factor of 2 gives a 6 dB improvement to fractional spurs. Also, since the spur offset
frequency is not divided, the channel spacing at the VCO can be also increased to improve the spurs. However,
if the on-chip VCO is used, crosstalk can cause spurs at a frequency of f
RFout
mod f
PD
. Consider the following
example of a 50 MHz phase detector frequency and VCO_DIV = 2. If the VCO is at 3000.1 MHz and divided by 2
to get 1500.05 MHz, there will be a spur at an offset of 50 kHz (1500.05 MHz mod 50 MHz). However, if the
VCO frequency is at 3050.1 MHz, the output will be at 1525.05 MHz, but the spur will be at a much farther offset
that can easily be filtered by the loop filter of 25.05 MHz (1525.05 MHz mod 50 MHz).
PLL Phase Noise
Disregarding the impact of reference oscillator noise, loop filter resistor thermal noise, and loop filter shaping, the
phase noise of the PLL can be decomposed into three components: flicker noise, flat noise, and fractional noise.
These noise sources add in an RMS sense to produce the total PLL noise. In other words:.
L
PLL
(f) =
10·log(10(
L
PLL_flat
(f) / 10 )
+ 10(
L
PLL_flicker
(f) / 10 )
+ 10(
L
PLL_fractional
(f) / 10 )
Potential Influencing Factors
Symbol
f f
VCO
f
PD
K
PD
FRAC
L
PLL_flat
(f) No Yes Yes Yes No
L
PLL_flicker
(f) Yes Yes No Yes No
L
PLL_fractional
(f) Yes No Yes No Yes
The preceding table shows which factors of offset frequency (f), VCO frequency (f
VCO
), phase detector frequency
(f
PD
), charge pump gain (K
PD
), and the fractional settings (FRAC) can potentially influence each phase noise
component. The fractional settings include the fraction, modulator order, and dithering.
For the flat noise and flicker noise, it is possible to normalize each of these noise sources into a single index. By
normalizing these noise sources to an index, it makes it possible to calculate the flicker and flat noise for an
arbitrary condition. These indices are reported in the electrical characteristics section and in the typical
performance curves.
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