Datasheet

LMX2541SQ2060E, LMX2541SQ2380E
LMX2541SQ2690E, LMX2541SQ3030E
LMX2541SQ3320E, LMX2541SQ3740E
SNOSB31I –JULY 2009–REVISED FEBRUARY 2013 www.ti.com
CPG Charge Pump State Typical Charge Pump Current (µA)
1 2X 200
2 3X 300
3 4X ...
... ...
31 32X 3200
MUX[3:0] -- Multiplexed Output for Ftest/LD Pin
The MUX[3:0] word is used to program the output of the Ftest/LD Pin. This pin can be used for a general
purpose I/O pin, a lock detect pin, and for diagnostic purposes. When programmed to the digital lock detect
state, the output of the Ftest/LD pin will be high when the device is in lock, and low otherwise. The output voltage
level of the Ftest/LD is not equal to the supply voltage of the device, but rather is given by V
OH
and V
OL
in the
electrical characteristics specification.
Because the Ftest/LD pin is close to the OSCin pin, the state of this pin can have an impact on the performance
of the device. If any of the diagnostic modes (8-13) are used, the OSCin sensitivity can be severely degraded, so
these should only be used for diagnostic purposes. The fractional spurs can also be impacted a little by the MUX
programming word. The Push-Pull digital lock detect modes, like mode 3, tend to have the best fractional spurs,
so these states are recommended, even if the digital lock detect function is not needed.
MUX Output Type Function Comments
0 High Impedance Disabled
1 Push-Pull Logical High State General Purpose I/O Modes
2 Push-Pull Logical Low State
3 Push-Pull Digital Lock Detect
4 Push-Pull Inverse Digital Lock Detect
Lock Detect Modes
5 Open Drain Digital Lock Detect Consult Functional Description for more details
State 3 is recommended for optimal spurious performance.
6 Open Drain Analog Lock Detect
7 Push-Pull Analog Lock Detect
8 Push-Pull N Divider
Diagnostic Modes
9 Push-Pull N Divider / 2
These allow the user to view the outputs of the N divider,
10 Push-Pull R Divider
R divider, and phase frequency detector (PFD) and are
11 Push-Pull R Divider / 2 intended only for diagnostic purposes. Typically, the output
is narrow pulses, but when the output is divided by 2, there
12 Push-Pull PFD Up
is a 50% duty cycle. The use of these modes (including R
13 Push-Pull PFD Down
Divider) can degrade the OSCin sensitivity.
14-15 N/A Reserved
CPP - Charge Pump Polarity
This bit sets the polarity of the phase detector.
CPP Charge Pump Polarity Typical Applications
Full Chip Mode
0 Negative
External VCO Mode with an inverting active loop filter.
1 Positive External VCO Mode with a passive loop filter.
OSC2X-- OSCin Frequency Doubler
Enabling this bit doubles the OSCin frequency. This is useful in achieving a higher phase detector frequency to
improve PLL phase noise, push out noise from the delta sigma modulator, and sometimes reduce fractional
spurs . Note that when this bit is enabled, the R divider is bypassed.
OSC_2X State
0 Normal
1 OSCin frequency is doubled
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Product Folder Links: LMX2541SQ2060E LMX2541SQ2380E LMX2541SQ2690E LMX2541SQ3030E
LMX2541SQ3320E LMX2541SQ3740E