Datasheet

LMX2541SQ2060E, LMX2541SQ2380E
LMX2541SQ2690E, LMX2541SQ3030E
LMX2541SQ3320E, LMX2541SQ3740E
www.ti.com SNOSB31I –JULY 2009–REVISED FEBRUARY 2013
FL_R3_LF Value R3 Resistor During Fastlock (kΩ)
5-7 Reserved
FL_R4_LF[2:0] -- Value for Internal Loop Filter Resistor R4 During Fastlock
FL_R4_LF Value R3 Resistor During Fastlock (kΩ)
0 Low ( 200 Ω )
1 1
2 2
3 4
4 16
5-7 Reserved
FL_CPG[4:0] -- Charge Pump Current for Fastlock
When FastLock is enabled, this is the charge pump current that is used for faster lock time.
Typical Fastlock Charge Pump Current at 3.3
FL_CPG Fastlock Charge Pump State
Volts (µA)
0 1X 100
1 2X 200
2 3X 300
3 4X 400
... ... ...
31 32X 3200
Register R4
This register controls miscellaneous functions of the device. The action of programming the R4 register also
synchronizes the VCO divider, which is necessary when VCO_DIV = 4 or 5.
OSC_FREQ [7:0] -- OSCin Frequency for VCO Calibration Clocking
This word is used for the VCO frequency calibration. This word should be set to the OSCin frequency rounded to
the nearest MHz.
OSC_FREQ OSCin Frequency
0 Illegal State
1 1 MHz
2 2 MHz
... ...
255 MHz
255
and higher
VCO_DIV[5:0] - VCO Divider
The output of the VCO is divided by the value of VCO_DIV, which can range from 1 (Bypass Mode) to 63 and all
values in between with the limitation that the VCO divider can only be set to bypass mode when the device is
operating in full chip mode. When the VCO divider is set to 4 or 5 ONLY, there is one extra programming step
required to synchronize the VCO divider. Consult the Functional Description for more details.
VCO_DIV VCO Output Divide Comments
0 n/a Illegal State
1 Bypass Mode This state only available for MODE=Full Chip Mode
2 Divide by 2
3 Divide by 3
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Product Folder Links: LMX2541SQ2060E LMX2541SQ2380E LMX2541SQ2690E LMX2541SQ3030E
LMX2541SQ3320E LMX2541SQ3740E