Datasheet

NO
NO
NO
YES
YES
YES
Phase Error < H
LD = LOW
(Not Locked)
Phase Error < H
Phase Error < H
LD = HIGH
(Locked)
Phase Error < H
Phase Error > G
YES
NO
NO
YES
START
YES
Phase Error < H
NO
LMX2541SQ2060E, LMX2541SQ2380E
LMX2541SQ2690E, LMX2541SQ3030E
LMX2541SQ3320E, LMX2541SQ3740E
SNOSB31I –JULY 2009–REVISED FEBRUARY 2013 www.ti.com
Parameter Symbol Calculation
R2pLF =
External Loop Filter Resistor R2pLF
R2_LF / (K - 1)
Lock Detect
The Ftest/LD pin of the LMX2541 can be configured to output a signal that gives an indication for the PLL being
locked. There are two styles of lock detect; analog and digital. The analog lock detect signal is more of a legacy
feature and consists a series of narrow pulses that correspond to when the charge pump comes on. These
pulses can be integrated with an external RC filter to create generate a lock detect signal. Analog lock detect can
be configured in a push-pull output or an open drain output. The analog open drain lock detect signal can be
integrated with a similar RC filter and requires an additional pull-up resistor. This pull-up resistor can be much
larger than the resistor in the RC filter in order to make unbalanced time constants for improved sensitivity.
The digital lock detect function can also be selected for the Ftest/LD pin to give a logic level indication of lock or
unlock. The digital lock detect circuitry works by comparing the difference between the phase of the inputs to the
phase detector with a RC generated delay of ε. To indicate a locked state (Lock = HIGH) the phase error must
be less than ε for 5 consecutive phase detector cycles. Once in lock (Lock = HIGH), the RC delay is changed to
δ. To indicate an out of lock state (Lock = LOW), the phase error must become greater than δ. The values of ε
and δ are programmable with the DLOCK word.
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Product Folder Links: LMX2541SQ2060E LMX2541SQ2380E LMX2541SQ2690E LMX2541SQ3030E
LMX2541SQ3320E LMX2541SQ3740E