Datasheet

OSCin
Signal Generator
Frequency Counter
SMA Cable
Device
Under
Test
Evaluation Board
SMA Cable
Power Supply
RFout Pin
Matching
Network
ExtVCOin
DC
Blocking
Capacitor
Signal Generator
Frequency Counter
SMA Cable
Device
Under
Test
Evaluation Board
SMA Cable
Power Supply
Ftest/LD
Pin
LMX2541SQ2060E, LMX2541SQ2380E
LMX2541SQ2690E, LMX2541SQ3030E
LMX2541SQ3320E, LMX2541SQ3740E
www.ti.com SNOSB31I –JULY 2009–REVISED FEBRUARY 2013
ExtVCOin (NOT OSCin) Input Sensitivity Test Setup
In order to measure the ExtVCOin Input sensitivity, the part is put in External VCO mode and a signal is applied
to the ExtVCOin pin. A matching network, which is typically a 3 dB pad, is used and this loss is added to the
measured numbers as well as any potential cable losses (on the order of 1 dB). A signal is applied at a known
frequency and power and the output of the N counter is monitored using the Ftest/LD pin and setting it to look at
the N counter output divided by 2. Typically, the divide by 2 function is better because if it is not used, the duty
cycle from the Ftest/LD pin is not 50% and this can sometimes confuse frequency counters. The part is set in
fractional mode with a large fraction of 502 + 2097150/4194301 to ensure that the fractional circuitry gets fully
tested. Accounting for the extra divide by 2 from the Ftest/LD pin, the divided output frequency should be the
input frequency divided by 1005 to a 1 ppm tolerance.
OSCin Input Sensitivity Test Setup
Input Sensitivity Test Procedure
There are two things that are important to consider when measuring the OSCin sensitivity.
• The action of setting the Ftest/LD pin to monitor the R divider output degrades the OSCin sensitivity.
• The internal VCO frequency calibration is based on the OSCin signal
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Product Folder Links: LMX2541SQ2060E LMX2541SQ2380E LMX2541SQ2690E LMX2541SQ3030E
LMX2541SQ3320E LMX2541SQ3740E