Datasheet

LMV7271

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SNOSA56H –FEBRUARY 2003–REVISED FEBRUARY 2013

Figure 30. Non-Inverting Comparator with Hysteresis

CIRCUIT TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS

Feedback to almost any pin of a comparator can result in oscillation. In addition, when the input signal is a slow

voltage ramp or sine wave, the comparator may also burst into oscillation near the crossing point. To avoid

oscillation or instability, PCB layout should be engineered thoughtfully. Several precautions are recommended:

1. Power supply bypassing is critical, and will improve stability and transient response. Resistance and

inductance from power supply wires and board traces increase power supply line impedance. When

supply current changes, the power supply line will move due to its impedance. Large enough supply line

shift will cause the comparator to mis-operate. To avoid problems, a small bypass capacitor, such as

0.1uF ceramic, should be placed immediately adjacent to the supply pins. An additional 6.8μF or greater

tantalum capacitor should be placed at the point where the power supply for the comparator is introduced

onto the board. These capacitors act as an energy reservoir and keep the supply impedance low. In dual

supply application, a 0.1μF capacitor is recommended to be placed across V

and V

−

pins.

2. Keep all leads short to reduce stray capacitance and lead inductance. It will also minimize any unwanted

coupling from any high-level signals (such as the output). The comparators can easily oscillate if the

output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows

up only during the output voltage transition intervals as the comparator changes states. Try to avoid a long

loop which could act as an inductor (coil).

3. It is a good practice to use an unbroken ground plane on a printed circuit board to provide all components

with a low inductive ground connection. Make sure ground paths are low-impedance where heavier

currents are flowing to avoid ground level shift. Preferably there should be a ground plane under the

component.

4. The output trace should be routed away from inputs. The ground plane should extend between the output

and inputs to act as a guard. This can be achieved by running a topside ground plane between the output

and inputs. A typical PCB layout is shown in Figure 31.

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