Datasheet
LMV721-N, LMV722-N
SNOS414I –AUGUST 1999–REVISED AUGUST 2013
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Figure 24. Pulse Response of the LMV721-N Circuit in Figure 23
The circuit in Figure 25 is an improvement to the one in Figure 23 because it provides DC accuracy as well as
AC stability. If there were a load resistor in Figure 23, the output would be voltage divided by R
ISO
and the load
resistor. Instead, in Figure 25, R
F
provides the DC accuracy by using feed-forward techniques to connect V
IN
to
R
L
. Caution is needed in choosing the value of R
F
due to the input bias current of the LMV721-N/722. C
F
and
R
ISO
serve to counteract the loss of phase margin by feeding the high frequency component of the output signal
back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Increased
capacitive drive is possible by increasing the value of C
F
. This in turn will slow down the pulse response.
Figure 25. Indirectly Driving A Capacitive Load with DC Accuracy
INPUT BIAS CURRENT CANCELLATION
The LMV721-N/722 family has a bipolar input stage. The typical input bias current of LMV721-N/722 is 260nA
with 5V supply. Thus a 100kΩ input resistor will cause 26mV of error voltage. By balancing the resistor values at
both inverting and non-inverting inputs, the error caused by the amplifier's input bias current will be reduced. The
circuit in Figure 26 shows how to cancel the error caused by input bias current.
Figure 26. Cancelling the Error Caused by Input Bias Current
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