Datasheet

LMV331-N, LMV339-N, LMV393-N
SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013 www.ti.com
OR GATES
A three input OR gate is achieved from the basic AND gate simply by increasing the resistor value connected
from the inverting input to V
cc
, thereby reducing the reference voltage.
A logic "1" at any of the inputs will produce a logic "1" at the output.
Figure 24. OR Gate
ORing THE OUTPUT
By the inherit nature of an open collector comparator, the outputs of several comparators can be tied together
with a pull up resistor to V
CC
. If one or more of the comparators outputs goes low, the output V
O
will go low.
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