Datasheet

LMV1089
www.ti.com SNAS441H –SEPTEMBER 2008–REVISED MAY 2010
Table 5. I
2
C Register Description (continued)
Address Reg. Bits Description Default
[3:0] Control compensation gain for left channel at ALL frequencies
0000 (0) –3.0dB
0001 (1) –3.0dB
0010 (2) –2.5dB
0011 (3) –2.0dB
0100 (4) –1.5dB
0101 (5) –1.0dB
0110 (6) –0.5dB
0111 (7) 0.0dB
1111
1000 (8) 0.0dB
1001 (9) 0.5dB
1010 (A) 1.0dB
1011 (B) 1.5dB
1100 (C) 2.0dB
1101 (D) 2.5dB
1110 (E) 3.0dB
1111 (F) 3.0dB
0x10h P
[7:4] Control compensation gain for right channel at ALL frequencies
0000 (0) –3.0dB
0001 (1) –3.0dB
0010 (2) –2.5dB
0011 (3) –2.0dB
0100 (4) –1.5dB
0101 (5) –1.0dB
0110 (6) –0.5dB
0111 (7) 0.0dB
1111
1000 (8) 0.0dB
1001 (9) 0.5dB
1010 (A) 1.0dB
1011 (B) 1.5dB
1100 (C) 2.0dB
1101 (D) 2.5dB
1110 (E) 3.0dB
1111 (F) 3.0dB
[6:0] Values are clocked into EEPROM registers once “newdata” pulse is generated
StoreBar signal
0x11h Q
[7] StoreBar = 0 enables EEPROM programming 1
StoreBar = 1 data clock into EEPROM registers
[0] Start Calibration via I2C ‘0’ to ‘1’ = start calibration (keep ‘1’ during calibration) 0
0x12h R
[7] Internal test 0000000
Calibration
Automatic calibration should only be required once, when the product containing the LMV1089 has completed
manufacture, and prior to application packaging. The product containing the LMV1089 will be calibrated to the
microphones, the microphone spacings, and the acoustical properties of the final design.
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