Datasheet

Analog
Noise
Cancelling
Processor
Optimized
Audio
Ouput
OUT
+
Post Amp Gain
(6-18
dB
)
Preamp Gain
(6-36
dB
)
Mic1
OUT
-
Mic2
LMV1089
www.ti.com SNAS441H –SEPTEMBER 2008–REVISED MAY 2010
APPLICATION DATA
INTRODUCTION
The LMV1089 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a
communication system. A simplified block diagram is provided in Figure 21.
Figure 21. Simplified Block Diagram of the LMV1089
The output signal of the microphones is first amplified by a pre-amplifier stage with an adjustable gain of 6dB to
36dB. The signal is then processed by the noise cancelling processor. The noise cancelling processor matches
the gain and frequency responses of the microphones and the acoustic characteristics of the enclosure using
coefficients derived during the auto-calibration step and the stored in EEPROM. The resulting noise-suppressed
signal is then amplified by the 6dB to 18dB gain-adjustable post-amplifier. For optimum noise and EMI immunity,
the microphones have a differential connection to the LMV1089 and the output of the LMV1089 is also
differential. The adjustable gain functions can be controlled via I
2
C and four control pins. Both methods are
described later in the application section.
Power Supply Circuits
A low drop-out (LDO) voltage regulator in the LMV1089 allows the device to be independent of supply voltage
variations.
The Power On Reset (POR) circuitry in the LMV1089 requires the supply voltage to rise from 0V to V
DD
in less
than 100ms.
The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on
the Mic Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The
de-coupling capacitor on the V
REF
pin determines the noise voltage on this internal reference. This capacitor
should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias
output.
Most of the logic levels for the digital control interface are relative to I
2
CV
DD
voltage. This eases interfacing to the
micro controller of the application containing the LMV1089. The supply voltage on the I
2
CV
DD
pin must never
exceed the voltage on the V
DD
pin.
Only the four pins that determine the default power up gain (as described in SETTING ADJUSTABLE GAIN)
have logic levels relative to V
DD
.
Shutdown Function
As part of the Powerwise™ family, the LMV1089 consumes only 1.1mA of current. In many applications the part
does not need to be continuously operational. To further reduce the power consumption in the inactive period,
the LMV1089 provides two individual microphone power down functions. When either one of the shutdown
functions is activated the part will go into shutdown mode consuming only a few μA of supply current.
SHUTDOWN VIA HARDWARE PIN
The hardware shutdown function is operated via the EN pin. In normal operation the EN pin must be at a 'high'
level (V
DD
). Whenever a 'low' level (GND) is applied to the EN pin the part will go into shutdown mode disabling
all internal circuits.
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