Datasheet
LMR70503
www.ti.com
SNVS850A –JUNE 2012–REVISED APRIL 2013
PC Board Layout Guidelines
Board layout is critical for the proper operation of switching power converters. Switch mode converters are very
fast switching devices. In such cases, the rapid increase of current combined with the parasitic trace inductance
generates unwanted L·di/dt noise spikes. The magnitude of this noise tends to increase as the output current
increases. This noise may turn into electromagnetic interference (EMI) and can also cause problems in device
performance. Therefore, care must be taken in layout to minimize the effect of this switching noise. The most
important layout rule is to keep the AC current loops as small as possible.
Figure 29 shows the current flow in a buck-boost converter. The two dotted arrows indicate the current paths
when the high side switch is on and when the power diode is on, respectively. The components and traces that
contain discontinuous currents are critical in PCB layout design, since discontinuous currents contain high di/dt
and high frequency noise. The components that carry critical discontinuous currents include the input
capacitor(s), the high side switch, the power diode and the output capacitor(s). These components need to be
placed as close as possible to each other and the traces between them must be made as short and wide as
possible: place the input capacitor(s) as close as possible to the VIN pin of the LMR70503; place the cathode of
the diode as close as possible to the SW pin; the anode of the diode should be as close as possible to the output
capacitor(s); the GND end of the output capacitor(s) should be as close as possible to that of the input
capacitor(s). Doing so will yield a small loop area, reducing the loop inductance and EMI.
The feedback resistors R
B
and R
T
should be placed as close as possible to the FB pin. Since FB is a high
impedance node, noise is likely be coupled to the FB node if the trace is long. The traces from V
OUT
to the
resistor divider and from the divider to the FB pin should be far away from the discontinuous current path. It is
recommended to use 4-layer board with ground plane as an internal layer, route the discontinuous current path
on the top layer and the feedback path on the other side of the ground plane. Then the feedback path will be
shielded from switching noise.
To avoid functional problems due to layout, review the PCB layout example in Figure 39. It is also recommended
to use 1oz copper boards or heavier to help reducing the parasitic inductances of board traces.
PCB Layout Example
Figure 39. PCB Layout Example (top layer and top overlay)
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