Datasheet

D =
O
V
O
V +
IN
V
V
o
V
IN
=
D'
D
=
( )
R
Load
2
D
'
Lx2S
RHP
ZERO
1
=F
CFPOLE
-
2S((R
1
R
2
) x C
3
)
=
1
( )
R
2
xC
3
2S
F
CFZERO-
LMR62421
SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com
(14)
There is an associated pole with the zero that was created in the above equation.
(15)
It is always higher in frequency than the zero.
A right-half plane zero (RHPZ) is inherent to all boost converters. One must remember that the gain associated
with a right-half plane zero increases at 20dB per decade, but the phase decreases by 45° per decade. For most
applications there is little concern with the RHPZ due to the fact that the frequency at which it shows up is well
beyond crossover, and has little to no effect on loop stability. One must be concerned with this condition for large
inductor values and high output currents.
(16)
There are miscellaneous poles and zeros associated with parasitics internal to the LMR62421, external
components, and the PCB. They are located well over the crossover frequency, and for simplicity are not
discussed.
PCB Layout Considerations
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing a Boost Converter layout is the close coupling of the GND
connections of the C
OUT
capacitor and the LMR62421 PGND pin. The GND ends should be close to one another
and be connected to the GND plane with at least two through-holes. There should be a continuous ground plane
on the bottom layer of a two-layer board. The FB pin is a high impedance node and care should be taken to
make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors should be
placed as close as possible to the IC, with the AGND of R1 placed as close as possible to the GND (pin 5 for the
WSON) of the IC. The V
OUT
trace to R2 should be routed away from the inductor and any other traces that are
switching. High AC currents flow through the V
IN
, SW and V
OUT
traces, so they should be as short and wide as
possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off.
Radiated noise can be decreased by choosing a shielded inductor. The remaining components should also be
placed as close as possible to the IC. Please see Application Note AN-1229 SNVA054 for further considerations
and the LMR62421 demo board as an example of a good layout.
SEPIC Converter
The LMR62421 can easily be converted into a SEPIC converter. A SEPIC converter has the ability to regulate an
output voltage that is either larger or smaller in magnitude than the input voltage. Other converters have this
ability as well (CUK and Buck-Boost), but usually create an output voltage that is opposite in polarity to the input
voltage. This topology is a perfect fit for Lithium Ion battery applications where the input voltage for a single cell
Li-Ion battery will vary between 3V & 4.5V and the output voltage is somewhere in between. Most of the analysis
of the LMR62421 Boost Converter is applicable to the LMR62421 SEPIC Converter.
SEPIC Design Guide:
SEPIC Conversion ratio without loss elements:
(17)
Therefore:
(18)
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