Datasheet

t
SS
=
8 PA
C
SS
x 0.8V
C
IN
=
'V
IN
I
OUT
x t
on
LMR24210
www.ti.com SNVS738G –OCTOBER 2011–REVISED APRIL 2013
C
OUT
and C
OUT3
: C
OUT
should generally be no smaller than 10 µF. Experimentation is usually necessary to
determine the minimum value for C
OUT
, as the nature of the load may require a larger value. A load which
creates significant transients requires a larger C
OUT
than a fixed load.
C
OUT3
is a small value ceramic capacitor located close to the LMR24210 to further suppress high frequency noise
at V
OUT
. A 100 nF capacitor is recommended.
C
IN
and C
IN3
: The function of C
IN
is to supply most of the main MOSFET current during the on-time, and limit the
voltage ripple at the VIN pin, assuming that the voltage source connecting to the VIN pin has finite output
impedance. If the voltage source’s dynamic impedance is high (effectively a current source), C
IN
supplies the
average input current, but not the ripple current.
At the maximum load current, when the main MOSFET turns on, the current to the VIN pin suddenly increases
from zero to the lower peak of the inductor’s ripple current and ramps up to the higher peak value. It then drops
to zero at turn-off. The average current during the on-time is the load current. For a worst case calculation, C
IN
must be capable of supplying this average load current during the maximum on-time. C
IN
is calculated from:
where
• I
OUT
is the load current
• t
on
is the maximum on-time
• ΔV
IN
is the allowable ripple voltage at V
IN
(12)
C
IN3
’s purpose is to help avoid transients and ringing due to long lead inductance at the VIN pin. A low ESR 0.1
µF ceramic chip capacitor located close to the LMR24210 is recommended.
C
BST
: A 33 nF high quality ceramic capacitor with low ESR is recommended for C
BST
since it supplies a surge
current to charge the main MOSFET gate driver at turn-on. Low ESR also helps ensure a complete recharge
during each off-time.
C
SS
: The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the
regulation comparator and the output voltage to reach their final value. The time is determined from the following
equation:
(13)
C
FB
: If the output voltage is higher than 1.6V, C
FB
is needed in the Discontinuous Conduction Mode to reduce the
output ripple. The recommended value for C
FB
is 10 nF.
PC BOARD LAYOUT
The LMR24210 regulation, over-voltage, and current limit comparators are very fast and may respond to short
duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and compact as
possible, and all external components must be as close to their associated pins of the LMR24210 as possible.
Refer to the Simplified Functional Block Diagram, the loop formed by C
IN
, the main and synchronous MOSFET
internal to the LMR24210, and the PGND pin should be as small as possible. The connection from the PGND pin
to C
IN
should be as short and direct as possible. Vias should be added to connect the ground of C
IN
to a ground
plane, located as close to the capacitor as possible. The bootstrap capacitor C
BST
should be connected as close
to the SW and BST pins as possible, and the connecting traces should be thick. The feedback resistors and
capacitor R
FB1
, R
FB2
, and C
FB
should be close to the FB pin. A long trace running from V
OUT
to R
FB1
is generally
acceptable since this is a low impedance node. Ground R
FB2
directly to the AGND pin. The output capacitor C
OUT
should be connected close to the load and tied directly to the ground plane. The inductor L should be connected
close to the SW pin with as short a trace as possible to reduce the potential for EMI (electromagnetic
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