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0.0 0.2 0.4 0.6 0.8 1.0

100

EFFICIENCY (%)

LOAD CURRENT (A)

VIN = 4.5V

VIN = 9V

VIN = 12v

VIN = 24V

VIN = 42v

0.0 0.2 0.4 0.6 0.8 1.0

-0.20

-0.15

-0.10

-0.05

0.00

0.05

0.10

0.15

0.20

ûV

OUT

(%)

LOAD CURRENT (A)

VIN = 4.5V

VIN = 9V

VIN = 12V

VIN = 24V

VIN = 42V

LMR24210

www.ti.com

SNVS738G –OCTOBER 2011–REVISED APRIL 2013

LMR24210 SIMPLE SWITCHER

42Vin, 1.0A Step-Down Voltage Regulator

Check for Samples: LMR24210

FEATURES

APPLICATIONS

• Input Voltage Range of 4.5V to 42V

• Point-of-Load Conversions from 5V, 12V and

24V Rails

• Output Voltage Range of 0.8V to 24V

• Space Constrained Applications

• Output Current up to 1.0A

• Industrial Distributed Power Applications

• Integrated low R

DS(ON)

Synchronous MOSFETs

for High Efficiency • Power Meters

• Up to 1 MHz Switching Frequency

DESCRIPTION

• Low Shutdown Iq, 25 µA Typical

The LMR24210 Synchronously Rectified Buck

• Programmable Soft-Start

Converter features all required functions to implement

• No Loop Compensation Required

a highly efficient and cost effective buck regulator. It

is capable of supplying 1A to loads with an output

• COT Architecture with ERM

voltage as low as 0.8V. Dual N-Channel synchronous

• 28-Bump DSBGA (2.45 x 3.64 x 0.60 mm)

MOSFET switches allow a low component count, thus

Packaging

reducing complexity and minimizing board size.

• Fully Enabled for WEBENCH

Power Designer

Different from most other COT regulators, the

LMR24210 does not rely on output capacitor ESR for

PERFORMANCE BENEFITS

stability, and is designed to work exceptionally well

• Tiny Overall Solution Reduces System Cost

with ceramic and other very low ESR output

capacitors. It requires no loop compensation, results

• Integrated Synchronous MOSFETs Provides

in a fast load transient response and simple circuit

High Efficiency at Low Output Voltages

implementation. The operating frequency remains

• COT with ERM Architecture Requires No Loop

nearly constant with line variations due to the inverse

Compensation, Reduces Component Count,

relationship between the input voltage and the on-

and Provides Ultra Fast Transient Response

time. The operating frequency can be externally

programmed up to 1 MHz. Protection features include

• Stable with Low ESR Capacitors

under-voltage lock-out, output over-voltage

protection, thermal shutdown, and gate drive under-

voltage lock-out. The LMR24210 is available in the

small DSBGA low profile chip-scale package.

System Performance

Efficiency vs Load Current V

OUT

Regulation vs Load Current

OUT

= 3.3V) (V

OUT

= 3.3V)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SIMPLE SWITCHER, WEBENCH are registered trademarks of Texas Instruments.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

PAGE 1
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 LMR24210 SIMPLE SWITCHER® 42Vin, 1.0A Step-Down Voltage Regulator Check for Samples: LMR24210 FEATURES APPLICATIONS • • • • • 1 23 • • • • • • • Input Voltage Range of 4.5V to 42V Output Voltage Range of 0.8V to 24V Output Current up to 1.
PAGE 2
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Typical Application LMR24210 Figure 1. Connection Diagram A B C D E F G 4 VIN VIN BST SW AGND RON EN 3 SW SW SW SW AGND AGND 2 SW SW SW SW VCC AGND SS 1 PGN D VCC AGND FB PGND PGND PGND AGND Top Mark Figure 2.
PAGE 3
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 PIN DESCRIPTIONS Ball Name Description Application Information A2, A3, B2, B3, C2, C3, D2, D3, D4 SW Switching Node Internally connected to the source of the main MOSFET and the drain of the Synchronous MOSFET. Connect to the inductor. A4, B4 VIN Input supply voltage Supply pin to the device. Nominal input range is 4.5V to 42V. C4 BST Connection for bootstrap capacitor Connect a 33 nF capacitor from the SW pin to this pin.
PAGE 4
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN, RON to AGND -0.3V to 43.5V SW to AGND -0.3V to 43.5V SW to AGND (Transient) -2V (< 100ns) VIN to SW -0.3V to 43.5V BST to SW -0.3V to 7V All Other Inputs to AGND ESD Rating -0.
PAGE 5
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 Electrical Characteristics Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction Temperature (TJ) range. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
PAGE 6
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified all curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V (Figure 27) TA = 25°C. VCC vs VIN Figure 3. Figure 4. ton vs VIN Switching Frequency, fSW vs VIN, VOUT=0.8V, 1000 Ron = 12.4k ; L = 3.3 H, Io = 0.4A Ron = 12.4k ; L = 3.3 H, Io = 1A 900 Ron = 12.4k ; L = 8.2 H, Io = 0.4A Ron = 12.4k ; L = 8.2 H, Io = 1A 800 Ron = 7.
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LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified all curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V (Figure 27) TA = 25°C. Efficiency vs Load Current (VOUT = 3.3V) 0.20 100 0.15 90 0.10 80 ûVOUT(%) EFFICIENCY (%) VOUT Regulation vs Load Current (VOUT = 3.3V) 70 0.05 0.00 -0.05 60 VIN = 4.5V VIN = 9V VIN = 12v VIN = 24V VIN = 42v 50 40 0.
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LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified all curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V (Figure 27) TA = 25°C. Shutdown Transient (VOUT = 3.3V, 1A Loaded) Continuous Mode Operation (VOUT = 3.3V, 1A Loaded) 'VO 20 mV/DIV VEN 2V/DIV VSW VO 5V/DIV 2V/DIV IO 500 mA/DIV IL 500 mA/DIV TIME (0.1 ms/DIV) TIME (2 Ps/DIV) Figure 15. Figure 16.
PAGE 9
LMR24210 www.ti.
PAGE 10
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com FUNCTIONAL DESCRIPTION The LMR24210 Step Down Switching Regulator features all required functions to implement a cost effective, efficient buck power converter capable of supplying 1A to a load. It contains Dual N-Channel main and synchronous MOSFETs. The Constant ON-Time (COT) regulation scheme requires no loop compensation, results in fast load transient response and simple circuit implementation.
PAGE 11
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 Startup Regulator (VCC) A startup regulator is integrated within the LMR24210. The input pin VIN can be connected directly to a line voltage up to 42V. The VCC output regulates at 6V, and is current limited to 65 mA. Upon power up, the regulator sources current into an external capacitor CVCC, which is connected to the VCC pin. For stability, CVCC must be at least 680 nF.
PAGE 12
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Figure 20. Shutdown Implementation Current Limit Current limit detection is carried out during the off-time by monitoring the re-circulating current through the synchronous MOSFET. Referring to Simplified Functional Block Diagram, when the main MOSFET is turned off, the inductor current flows through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 1.
PAGE 13
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 N-Channel MOSFET and Driver The LMR24210 integrates an N-Channel main MOSFET and an associated floating high voltage main MOSFET gate driver. The gate drive circuit works in conjunction with an external bootstrap capacitor CBST and an internal high voltage diode. CBST connecting between the BST and SW pins powers the main MOSFET gate driver during the main MOSFET on-time.
PAGE 14
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Thermal Derating Temperature rise increases with frequency, load current, input voltage and smaller board dimensions. On a typical board, the LMR24210 is capable of supplying 1A below an ambient temperature of 90°C under worst case operation with input voltage of 42V. Figure 23 shows a thermal derating curve for the output current without thermal shutdown against ambient temperature up to 125°C.
PAGE 15
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 APPLICATIONS INFORMATION EXTERNAL COMPONENTS The following guidelines can be used to select external components. RFB1 and RFB2 : These resistors should be chosen from standard values in the range of 1.0 kΩ to 10 kΩ, satisfying the following ratio: RFB1/RFB2 = (VOUT/0.8V) - 1 (9) For VOUT = 0.8V, the FB pin can be connected to the output directly with a pre-load resistor drawing more than 20 µA.
PAGE 16
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com If the output current IOUT is determined, by assuming that IOUT = IL, the higher and lower peak of ILR can be determined. Beware that the higher peak of ILR should not be larger than the saturation current of the inductor and current limits of the main and synchronous MOSFETs. Also, the lower peak of ILR must be positive if CCM operation is required. Figure 25. Inductor selection for VOUT = 3.3V Figure 26. Inductor selection for VOUT = 0.
PAGE 17
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 COUT and COUT3: COUT should generally be no smaller than 10 µF. Experimentation is usually necessary to determine the minimum value for COUT, as the nature of the load may require a larger value. A load which creates significant transients requires a larger COUT than a fixed load. COUT3 is a small value ceramic capacitor located close to the LMR24210 to further suppress high frequency noise at VOUT. A 100 nF capacitor is recommended.
PAGE 18
LMR24210 SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com interference) generation. If it is expected that the internal dissipation of the LMR24210 will produce excessive junction temperature during normal operation, making good use of the PC board’s ground plane can help considerably to dissipate heat. Additionally the use of thick traces, where possible, can help conduct heat away from the LMR24210.
PAGE 19
LMR24210 www.ti.com SNVS738G – OCTOBER 2011 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision E (April 2013) to Revision F • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LMR24210TL/NOPB DSBGA YPA 28 250 178.0 12.4 LMR24210TLX/NOPB DSBGA YPA 28 1000 178.0 12.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2.64 3.84 0.76 8.0 12.0 Q1 2.64 3.84 0.76 8.0 12.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR24210TL/NOPB DSBGA YPA LMR24210TLX/NOPB DSBGA YPA 28 250 210.0 185.0 35.0 28 1000 210.0 185.0 35.
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MECHANICAL DATA YPA0028 D 0.600 ±0.075 E TLC28XXX (Rev A) D: Max = 3.676 mm, Min =3.615 mm E: Max = 2.48 mm, Min = 2.419 mm 4215064/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.
PAGE 24
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