Datasheet

LMR14203
SNVS732C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com
Electrical Characteristics
Specifications in standard type face are for T
J
= 25°C and those with boldface type apply over the full Operating
Temperature Range ( T
J
= −40°C to +125°C). Minimum and Maximum limits are ensured through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at T
J
= +25°C, and are provided for reference purposes
only. Unless otherwise stated the following conditions apply: V
IN
= 12V.
Parameter Test Conditions Min
(1)
Typ
(2)
Max
(1)
Units
I
Q
Quiescent current SHDN = 0V 16 40 µA
Device On, Not Switching 1.30 1.75
mA
Device On, No Load 1.35 1.85
R
DSON
Switch ON resistance See
(3)
0.9 1.6 Ω
I
LSW
Switch leakage current V
IN
= 42V 0.0 0.5 µA
I
CL
Switch current limit See
(4)
525 mA
I
FB
Feedback pin bias current See
(5)
0.1 1.0 µA
V
FB
FB Pin reference voltage 0.747 0.765 0.782 V
t
MIN
Minimum ON time 100 ns
f
SW
V
FB
= 0.5V 0.95 1.25 1.50
Switching frequency MHz
V
FB
= 0V 0.35
D
MAX
Maximum duty cycle 81 87 %
V
UVP
Undervoltage lockout thresholds On threshold 4.4 3.7
V
Off threshold 3.5 3.25
V
SHDN
Shutdown threshold Device on 2.3 1.0
V
Device off 0.9 0.3
I
SHDN
Shutdown pin input bias current V
SHDN
= 2.3V
(5)
0.05 1.5
µA
V
SHDN
= 0V 0.02 1.5
THERMAL SPECIFICATIONS
R
θJA
Junction-to-Ambient Thermal See
(6)
121 °C/W
Resistance, SOT-6L Package
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% production tested. All limits at temperature extremes are ensured via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Includes the bond wires, R
DSON
from V
IN
pin to SW pin.
(4) Current limit at 0% duty cycle.
(5) Bias currents flow into pin.
(6) All numbers apply for packages soldered directly onto a 3" x 3" PC board with 2 oz. copper on 4 layers in still air in accordance to
JEDEC standards. Thermal resistance varies greatly with layout, copper thickness, number of layers in PCB, power distribution, number
of thermal vias, board size, ambient temperature, and air flow.
4 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LMR14203