Datasheet

0
0
V
IN
V
D
T
ON
t
t
Inductor
Current
D = T
ON
/T
SW
V
SW
T
OFF
T
SW
I
L
I
PK
SW
Voltage
LMR12010
www.ti.com SNVS731A –SEPTEMBER 2011–REVISED SEPTEMBER 2011
APPLICATION INFORMATION
Theory of Operation
The LMR12010 is a constant frequency PWM buck regulator IC that delivers a 1A load current. The regulator
has a preset switching frequency of either 3 MHz (LMR12010Y) or 1.6MHz (LMR12010X). These high
frequencies allow the LMR12010 to operate with small surface mount capacitors and inductors, resulting in
DC/DC converters that require a minimum amount of board space. The LMR12010 is internally compensated, so
it is simple to use, and requires few external components. The LMR12010 uses current-mode control to regulate
the output voltage.
The following operating description of the LMR12010 will refer to the Simplified Block Diagram (Figure 20) and to
the waveforms in Figure 21. The LMR12010 supplies a regulated output voltage by switching the internal NMOS
control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the
reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the
internal NMOS control switch. During this on-time, the SW pin voltage (V
SW
) swings up to approximately V
IN
, and
the inductor current (I
L
) increases with a linear slope. I
L
is measured by the current-sense amplifier, which
generates an output proportional to the switch current. The sense signal is summed with the regulator’s
corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the
feedback voltage and V
REF
. When the PWM comparator output goes high, the output switch turns off until the
next switching cycle begins. During the switch off-time, inductor current discharges through Schottky diode D1,
which forces the SW pin to swing below ground by the forward voltage (V
D
) of the catch diode. The regulator
loop adjusts the duty cycle (D) to maintain a constant output voltage.
Figure 21. LMR12010 Waveforms of SW Pin Voltage and Inductor Current
BOOST Function
Capacitor C
BOOST
and diode D2 in Figure 22 are used to generate a voltage V
BOOST
. V
BOOST
- V
SW
is the gate
drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time,
V
BOOST
needs to be at least 1.6V greater than V
SW
. Although the LMR12010 will operate with this minimum
voltage, it may not have sufficient gate drive to supply large values of output current. Therefore, it is
recommended that V
BOOST
be greater than 2.5V above V
SW
for best efficiency. V
BOOST
– V
SW
should not exceed
the maximum operating limit of 5.5V.
5.5V > V
BOOST
– V
SW
> 2.5V for best performance.
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