Datasheet

1
2
3
6
5
4
1
2
3
6
5
4
BOOST
GND
FB
SW
V
IN
EN
LMR12010
SNVS731A –SEPTEMBER 2011–REVISED SEPTEMBER 2011 www.ti.com
System Performance
Efficiency Efficiency
vs vs
Load Current - "X" V
OUT
= 5V Load Current - "Y" V
OUT
= 5V
Connection Diagram
Figure 1. 6-Lead SOT
Package Number DDC0006A
Figure 2. Pin 1 Identification
PIN DESCRIPTIONS
Pin Name Function
1 BOOST Boost voltage that drives the internal NMOS control switch. A bootstrap
capacitor is connected between the BOOST and SW pins.
2 GND Signal and Power ground pin. Place the bottom resistor of the feedback
network as close as possible to this pin for accurate regulation.
3 FB Feedback pin. Connect FB to the external resistor divider to set output
voltage.
4 EN Enable control input. Logic high enables operation. Do not allow this pin to
float or be greater than V
IN
+ 0.3V.
5 V
IN
Input supply voltage. Connect a bypass capacitor to this pin.
6 SW Output switch. Connects to the inductor, catch diode, and bootstrap
capacitor.
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