Datasheet

R1 =
V
O
- 1
V
REF
x R2
I
RMS-OUT
= I
O
x
r
12
LMR12010
www.ti.com SNVS731A –SEPTEMBER 2011–REVISED SEPTEMBER 2011
Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet
the following condition:
(21)
Catch Diode
The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching
times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than:
I
D1
= I
O
x (1-D) (22)
The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.
To improve efficiency choose a Schottky diode with a low forward voltage drop.
BOOST Diode
A standard diode such as the 1N4148 type is recommended. For V
BOOST
circuits derived from voltages less than
3.3V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small
signal diode.
BOOST Capacitor
A ceramic 0.01µF capacitor with a voltage rating of at least 6.3V is sufficient. The X7R and X5R MLCCs provide
the best performance.
Outup Voltage
The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and
R1 is connected between V
O
and the FB pin. A good value for R2 is 10kΩ.
(23)
PCB Layout Considerations
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing the layout is the close coupling of the GND connections of the C
IN
capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the
GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in
importance is the location of the GND connection of the C
OUT
capacitor, which should be near the GND
connections of C
IN
and D1.
There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching
node island.
The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup
and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND
of R2 placed as close as possible to the GND of the IC. The V
OUT
trace to R1 should be routed away from the
inductor and any other traces that are switching.
High AC currents flow through the V
IN
, SW and V
OUT
traces, so they should be as short and wide as possible.
However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated
noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close as possible to the IC. Refer to the LMR12010 demo
board as an example of a good layout.
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