Datasheet
0
0
V
IN
-V
D
T
ON
t
t
Inductor
Current
D = T
ON
/T
SW
V
SW
T
OFF
T
SW
I
L
SW
Voltage
'i
L
I
OUT
I
LPK
LMR10530
SNVS814A –JUNE 2012–REVISED APRIL 2013
www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
The LMR10530 is a constant frequency PWM buck regulator IC that delivers a 3.0A load current. The regulator is
available in preset switching frequencies of 1.5MHz or 3.0MHz. This high frequency allows the LMR10530 to
operate with small surface mount capacitors and inductors, resulting in a DC/DC converter that requires a
minimum amount of board space. The LMR10530 is internally compensated, therefore it is simple to use and
requires few external components. The LMR10530 uses peak current-mode control to regulate the output
voltage. The following description of operation of the LMR10530 will refer to the Typical Application Circuit, to the
waveforms in Figure 23 and simplified block diagram in Figure 22. The LMR10530 supplies a regulated output
voltage by switching the internal PMOS power switch at a constant frequency and variable duty cycle. A
switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse
goes low, the output control logic turns on the internal PMOS power switch. During this on-time, the SW pin
voltage (V
SW
) swings up to approximately V
IN
, and the inductor current (I
L
) increases with a linear slope. I
L
is
measured by the current sense amplifier, which generates an output proportional to the switch current. The
sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which
is proportional to the difference between the feedback voltage and V
REF
. When the PWM comparator output goes
high, the internal power switch turns off until the next switching cycle begins. During the switch off-time, the
inductor current discharges through the catch diode D1, which forces the SW pin to swing below ground by the
forward voltage (V
D
) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant
output voltage.
Figure 23. SW Pin Voltage and Inductor Current Waveforms
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