Datasheet
LMP92001
SNAS507B –FEBRUARY 2011–REVISED APRIL 2012
www.ti.com
OPERATING CONDITIONS
(1)(2)
(continued)
θ
JA
24°C/W
θ
JC
2°C/W
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, these specifications apply for VDD=4.75V to 5.5V, AREF=DREF=VDD, T
A
=25°C. Boldface limits are
over the temperature range of −40°C ≤ T
A
≤ 125°C unless otherwise noted. DAC input code range 48 to 4047. DAC output C
L
= 200 pF unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
DAC CHARACTERISTICS
Resolution 12 12 Bits
Monotonicity 12 Bits
DNL Differential Non-Linearity R
L
= 100k −0.6 0.6
LSB
INL Integral Non-Linearity R
L
= 100k −8 8
ZE Zero Error R
L
= 100k 15 mV
ZEDRIFT Zero Error Temperature Drift R
L
= 100k 2.0 µV/°C
FSE Full-Scale Error R
L
= 100k 0 −0.75
%FS
GE Gain Error R
L
= 100k 0 −1
GEDRIFT Gain Error Temperature Drift R
L
= 100k 11.0 ppm/° C
I
OUT
= 200 µA 7
ZCO Zero Code Output mV
I
OUT
= 1mA 31
FSO Full Scale Output at code 4095 VDD = DREF = 5V, I
OUT
= 1mA 4.988 4.995 VDD V
VDD = 5V, OUT = 0V,
Output Short Circuit Current Input Code = FFFh
I
OS
−60
(Source)
(1)
CDAC.OFF=0
C[4:1]=HIGH
VDD = 5V, OUT = DREF,
mA
Output Short Circuit Current (Sink) Input Code = 000h
I
OS
70
(1)
CDAC.OFF=0
C[4:1]=HIGH
T
A
= 105° C 10
Continuous Output Current per
I
O
Channel (to prevent damage)
T
A
= 125° C 6.5
C
L
Load Capacitance R
L
= 2k or ∞ 1500 pF
DC Output Impedance 8 Ω
R
L
= 100k, C[1:4] = GND,
OUT[1:12] Output Voltage when
4.992 VDD V
CDAC.OLVL = 1
Asynchronous Output Control is
activated
C[1:4] = GND, CDAC.OLVL = 0 GND 0.6 mV
ADC CHARACTERISTICS
11
Resolution with No Missing Codes Bits
−40°C ≤ T
A
≤ 105°C 12
TUE Total Unadjusted Error −0.1 0.1 %
−40°C ≤ T
A
≤ 105°C −0.99 1
DNL Differential Non-Linearity
−1.2 1
LSB
INL Integral Non-Linearity ±0.6
OE Offset Error −2.3 2.3
OEDRIFT Offset Error Temperature Drift 0.005 LSB/°C
OEMTCH Offset Error Match −1.5 1.5 LSB
GE Gain Error −2 2
GEDRIFT Gain Error Temperature Drift −0.002 LSB/°C
GEMTCH Gain Error Match −1.5 1.5 LSB
SNR Signal-to-Noise Ratio 72 dB
(1) Indicates the typical internal short circuit current limit. Sustained operation at this level will lead to device damage.
8 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links: LMP92001