Datasheet

LIHx
ADCx
LILx
A>B
B
A
A7C
C
SHIL
SLOL
Hx
Lx
Register bit
Register
LMP92001
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SNAS507B FEBRUARY 2011REVISED APRIL 2012
Reference
By default the ADC operates from the external reference voltage applied at AREF pin of the device. Due to the
architecture of the ADC the DC current flowing into the AREF input is zero during conversion. However, the
transient currents during the conversion can be significant.
The user can enable the internal reference generator and apply its output to the ADC VREF. This operation is
described in CONTROL REGISTERS.
Window Comparator Function
The digital window comparator function is available for ADC input channels 1-3 and 9-11. This feature does not
require explicit enabling, as it is always on. Comparator functional diagram is shown in Figure 16 below.
The ADC conversion result stored in ADCx register can be compared against user programmable upper and
lower limits: LIHx and LILx. The comparison result is reported as a single bit value in SHIL and SLOL registers.
Figure 16. ADC Window Comparator Function
Interrupt Subsystem
Device outputs INT1 and INT2 report out of bounds conditions as determined by the digital window comparator.
INT1 and INT2 are open collector outputs and are active LO. INT1 reports out of bound conditions at ADC
channels 1-3, and INT2 reports out of bound conditions at ADC channels 9-11. Functional diagram of the
interrupt system is shown in Figure 17.
Additionally, presence of any out of bound condition is reported in the SGEN register, which can be tested via the
I
2
C-compatible interface.
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