Datasheet

LMP90100
SNAS510P –JANUARY 2011–REVISED MARCH 2013 www.ti.com
Table 27. SENDIAG_FLAGS: Sensor Diagnostic Flags (Address 0x19)
Bit Bit Symbol Bit Description
Short Circuit Threshold Flag = 1 when the absolute value of VOUT is within the absolute threshold
7 SHORT_THLD_ FLAG
voltage set by SENDIAG_THLDH and SENDIAG_THLDL.
6 RAILS_FLAG Rails Flag = 1 when at least one of the inputs is near rail (VA or GND).
Power-on-reset after last read = 1 when there was a power-on-reset event since the last time the
5 POR_AFT_LST_RD
SENDIAG_FLAGS register was read.
Overflow flags
0x0: Normal operation
0x1: The modulator was not overranged, but ADC_DOUT got clamped to 0x7f_ffff (positive
[4:3] OFLO_FLAGS
fullscale) or 0x80_0000 (negative full scale)
0x2: The modulator was over-ranged (VIN > 1.3*VREF/GAIN)
0x3: The modulator was over-ranged (VIN < -1.3*VREF/GAIN)
[2:0] SAMPLED_CH Channel Number – the sampled channel for ADC_DOUT and SENDIAG_FLAGS.
SPI REGISTERS
Table 28. SPI_HANDSHAKECN: SPI Handshake Control (Address 0x01)
Bit Bit Symbol Bit Description
[7:4] Reserved -
SDO/DRDYB Driver – sets who is driving the SDO/DRYB pin
Whenever CSB is
Whenever CSB is
Asserted and the Device
Asserted and the Device CSB is Deasserted
is Not Reading
is Reading ADC_DOUT
ADC_DOUT
[3:1] SDO_DRDYB_ DRIVER
0x0 (default) SDO is driving DRDYB is driving High-Z
0x3 SDO is driving DRDYB is driving DRDYB is driving
0x4 SDO is driving High-Z High-Z
Others Forbidden
Switch-off trigger - refers to the switching of the output drive from the slave to the master.
0 (default): SDO will be high-Z after the last (16th, 24th, 32nd, etc) rising edge of SCLK. This
option allows time for the slave to transfer control back to the master at the end of the frame.
0 SW_OFF_TRG
1: SDO’s high-Z is postponed to the subsequent falling edge following the last (16th, 24th, 32nd,
etc) rising edge of SCLK. This option provides additional hold time for the last bit, DB0, in non-
streaming read transfers.
Table 29. SPI_STREAMCN: SPI Streaming Control (Address 0x03)
Bit Bit Symbol Bit Description
Stream type
7 STRM_TYPE 0 (default): Normal Streaming mode
1: Controlled Streaming mode
Stream range – selects Range for Controlled Streaming mode
[6:0] STRM_ RANGE
Default: 0x00
Table 30. DATA_ONLY_1: Data Only Read Control 1 (Address 0x09)
Bit Bit Symbol Bit Description
7 Reserved -
Start address for the Data Only Read Transaction
[6:0] DATA_ONLY_ADR
Default: 0x1A
Please refer to the description of DT_ONLY_SZ in DATA_ONLY_2 register.
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