Datasheet

VA
Internal
CLK
Ext. Clk
Detect
CLK/
XIN
XOUT
CSB
SCLK
SDI
SDO/DRDYB
VREFP1
VREFN1
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
IB1
IB2
VA
EXC.
CURRENT
GND
GPIO
D0
D6/
DRDYB
Open/Short
Sensor Diag.
VIO
EXC.
CURRENT
SERIAL I/F
CONTROL
&
CALIBRATION
DATA PATH
POR
24 bit
Module
SD
DIGITAL
FILTER
CLK
MUX
BUFF
VIN6/VREFP2
MUX
Chip Configurable
Channel Configurable
Fixed
LMP90xxx
BACKGROUND
CALIBRATION
PGA
1x, 2x,
4x, 8x
VIN7/VREFN2
VREF
FGA
16x
INPUT MUX
LMP90100/LMP9
0098 only
LMP90100/LMP9
0099 only
LMP90100
www.ti.com SNAS510P –JANUARY 2011–REVISED MARCH 2013
Block Diagram
Figure 1. Block Diagram
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